Function description TDA7705
12/42 Doc ID 15938 Rev 9
2.12 IO interface pins
The TDA7705 has the following IO pins:
The pins labeled GPIO0, 1, 2 and 3 (pins 43 to 40) are reserved.
The pin PLLTEST output voltage can be freely programmed via software and be used to
drive switches if needed by the application.
All the inputs are voltage-tolerant up to 3.5 V . The outputs can drive currents up to 0.5 mA
from the internal 3.3 V supply line.
2.13 Serial interface
The device is controlled with a standard I
2
C bus or SPI interface.
Through the serial bus the processing parameters can be modifed and the signal quality
parameters and the RDS information can be read out.
The operation of the device is handled through high level commands sent by the main car-
radio µP through the serial interface, which allow to simplify the operations carried out in the
main µP. The high level commands include among others:
● set frequency (which allows to avoid computing the PLL divider factors);
● start seek (the seek operation can be carried out by the TDA7705 in a completely
autonomous fashion);
● RDS seek/search (jumps to AF and quality measurements are automatically
sequenced).
2.13.1 Serial interface choice / boot mode
The device can communicate with the main µP with two different standard serial protocols:
SPI and I
2
C. The configuration is chosen by setting the proper value (0V or 3.3V) at pins 35
and 39 and it is latched (e.g. made effective) when the RSTN line transitions from low to
high (when RSTN is low, the IC is in reset mode).
The voltage level forced to pins 35 and 39 must be released to start the system operation a
suitable time after the RSTN line has gone high.
The list of configurations is shown in the following table:
PLLTEST pin 2 general purpose output
SPI_CS pin 34 serial communication with µP
SPI_MISO pin 35 serial communication with µP
SDA/MOSI pin 36 serial communication with µP
SCL/CLK pin 37 serial communication with µP
RDSINT pin 39 serial communication with µP
RSTN pin 45 reset pin driven by µP
