Block diagram and pins description TDA7705
8/42 Doc ID 15938 Rev 9
17 LNAdec AM LNA decoupling
18 LNAout AM LNA output first stage
19 LNAin2 AM LNA input 2
nd
stage
20 LNAout2 AM LNA output
21 LNAdec2 AM LNA decoupling 2
nd
stage
22 AMMIXin2 AM mixer input 2
23 AMMIXin1 AM mixer input 1
24 AMMIXdec AM mixer decoupling
25 GND-IF IF and Vref GND
26 VREF165 1.65V reference voltage decoupling
27 VREFdec 3.3V reference voltage decoupling
28 GND-DIG Digital GND
29 VCC-DIG 5V supply for digital logic
30 VCCreg1V2 VCC of 1.2V regulator
31 REG1V2 1.2V regulator output
32 VDD-3V3 3.3V VDD output / decoupling
33 GND-3V3 3.3V VDD GND
34 SPI_CS SPI chip select
35 SPI_MISO SPI Data output
36 SDA / SPI_MOSI I
2
C bus data / SPI data input
37 SCL / SPI_CLK I
2
C bus Clock / SPI clock
38 VDD-1V2 1.2V DSP supply
39 RDSINT RDS interrupt
40 GPIO3 Reserved
41 GPIO2 Reserved
42 GPIO 1 Reserved
43 GPIO 0 Reserved
44 MODE For debug purpose only, connected to GND
45 RSTN Reset pin (active low)
46 TEST Test input
47 VDD-1V2 1.2V DSP supply
48 GND-1V2 Digital GND for 1.2V VDD
49 VCC-DAC 5V supply of audio DAC
50 OSCout Xtal osc output
51 OSCin Xtal osc input
Table 2. Pin description (continued)
Pin # Pin name Function
