Electrical specifications TDA7705
20/42 Doc ID 15938 Rev 9
3.4.7 Audio DAC
3.4.8 IO interface pins
Table 13. Audio DAC
Symbol Parameter Test condition Min Typ Max Units
V
out
Max. output voltage Full scale - 1 - Vrms
BW Bandwidth 1dB attenuation - 15 - KHz
R
out
Output resistance - 600 750 900
V
N, out
Output noise - - 60 95 µVrms
THD Distortion -6 dBFS - 0.03 0.04 %
Table 14. IO interface pins
Symbol Parameter Test condition Min Typ Max Units
-
High level output voltage (all
IOs except GPO pin 2)
I
out
= 500 µA 2.9 3.2 - V
-
GPIOs source current (all IOs
in source mode except pin 2)
Total sourced current by all
GPIOs
- - 1.25 mA
-
Low level output voltage (all
IOs except GPO pin 2)
I
out
= -1 mA - 0.1 0.3 V
- Input voltage range - 0 - 3.5 V
- High level input voltage - 2.0 - - V
- Low level input voltage - - - 0.8 V
T
reset
Reset time
Minimum time during which
pin RSTN must be low so as
to reset the device
10 - - µs
T
latch
Boot mode configuration latch
time
Minimum time during which
the voltage applied at pins 25
and 39 must be kept in order
to latch the correct boot mode
(serial bus configuration)
10 - - µs
-
GPO PLLTEST (pin 2) max
source current
---1mA
-
GPO PLLTEST (pin 2) max
sink current
--1-mA
-
GPO PLLTEST (pin 2)
minimum high level output
voltage
I
out
= 1 mA 2.8 3.1 - V
GPO PLLTEST (pin 2)
maximum high level output
voltage
I
out
= 1 mA - 0.1 0.3 V
