CY62167EV30 MoBL
®
Document Number: 38-05446 Rev. *N Page 4 of 19
Maximum Ratings
Exceeding maximum ratings may shorten the useful life of the
device. User guidelines are not tested.
Storage temperature ............................... –65 °C to + 150 °C
Ambient temperature with
power applied ......................................... –55 °C to + 125 °C
Supply voltage to ground
potential
[5, 6]
....................–0.3 V to 3.9 V (V
CC(max)
+ 0.3 V)
DC voltage applied to outputs
in High Z state
[5, 6]
...........–0.3 V to 3.9 V (V
CC(max)
+ 0.3 V)
DC input voltage
[5, 6]
.......–0.3 V to 3.9 V (V
CC(max)
+ 0.3 V)
Output current into outputs (LOW) .............................20 mA
Static discharge voltage
(MIL-STD-883, Method 3015) ................................. >2001 V
Latch-up current .....................................................>200 mA
Operating Range
Device Range
Ambient
Temperature
V
CC
[7]
CY62167EV30LL Industrial /
Automotive-A
–40 °C to +85 °C 2.2 V to
3.6 V
Electrical Characteristics
Over the Operating Range
Parameter Description Test Conditions
45 ns (Industrial/Automotive-A)
Unit
Min Typ
[8]
Max
V
OH
Output HIGH voltage 2.2 < V
CC
< 2.7 I
OH
= –0.1 mA 2.0 V
2.7 <
V
CC
< 3.6 I
OH
= –1.0 mA 2.4 V
V
OL
Output LOW voltage 2.2 < V
CC
< 2.7 I
OL
= 0.1 mA 0.4 V
2.7 < V
CC
< 3.6 I
OL
= 2.1 mA 0.4 V
V
IH
Input HIGH voltage 2.2 < V
CC
< 2.7 1.8 V
CC
+ 0.3 V V
2.7 <
V
CC
< 3.6 2.2 V
CC
+ 0.3 V V
V
IL
Input LOW voltage 2.2 < V
CC
< 2.7 –0.3 0.6 V
2.7 <
V
CC
< 3.6 For VFBGA package –0.3 0.8 V
For TSOP I package –0.3 0.7
[9]
V
I
IX
Input leakage current GND < V
I
< V
CC
–1 +1 A
I
OZ
Output leakage current GND < V
O
< V
CC
, Output disabled –1 +1 A
I
CC
V
CC
operating supply current f = f
max
= 1/t
RC
V
CC
= V
CC(max)
I
OUT
= 0 mA
CMOS levels
–25 30mA
f = 1 MHz 2.2 4.0 mA
I
SB1
[10]
Automatic power down
current—CMOS inputs
CE
1
> V
CC
– 0.2 V or CE
2
< 0.2 V
or (BHE
and BLE) > V
CC
– 0.2 V,
V
IN
> V
CC
– 0.2 V, V
IN
< 0.2 V,
f = f
max
(address and data only),
f = 0 (OE
, and WE), V
CC
= V
CC(max)
–1.5 12A
I
SB2
[10]
Automatic power down
current—CMOS inputs
CE1 > V
CC
– 0.2V or CE2 < 0.2 V or
(BHE
and BLE) > V
CC
– 0.2 V,
V
IN
> V
CC
– 0.2 V or V
IN
< 0.2 V,
f = 0, V
CC
= V
CC(max)
–1.5 12A
Notes
5. V
IL(min)
= –2.0 V for pulse durations less than 20 ns.
6. V
IH(max)
= V
CC
+ 0.75 V for pulse durations less than 20 ns.
7. Full Device AC operation assumes a 100 s ramp time from 0 to V
CC(min)
and 200 s wait time after V
CC
stabilization.
8. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ)
, T
A
= 25 °C.
9. Under DC conditions the device meets a V
IL
of 0.8 V. However, in dynamic conditions Input LOW Voltage applied to the device must not be higher than 0.7 V. This is
applicable to TSOP I package only.
10. Chip enables (CE
1
and CE
2
), byte enables (BHE and BLE) and BYTE must be tied to CMOS levels to meet the I
SB1
/I
SB2
/ I
CCDR
spec. Other inputs can be left floating.
CY62167EV30 MoBL
®
Document Number: 38-05446 Rev. *N Page 5 of 19
Capacitance
Parameter
[11]
Description Test Conditions Max Unit
C
IN
Input capacitance T
A
= 25 °C, f = 1 MHz, V
CC
= V
CC(typ)
10 pF
C
OUT
Output capacitance 10 pF
Thermal Resistance
Parameter
[11]
Description Test Conditions 48-ball VFBGA 48-pin TSOP I Unit
JA
Thermal resistance
(junction to ambient)
Still air, soldered on a 3 × 4.5 inch,
two-layer printed circuit board
55 60 °C/W
JC
Thermal resistance
(junction to case)
16 4.3 °C/W
AC Test Loads and Waveforms
Figure 3. AC Test Loads and Waveforms
V
CC
V
CC
OUTPUT
R2
30 pF
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
Rise Time = 1 V/ns
Fall Time = 1 V/ns
OUTPUT V
Equivalent to: THÉVENIN EQUIVALENT
ALL INPUT PULSES
R
TH
R1
Parameters 2.2 V to 2.7 V 2.7 V to 3.6 V Unit
R1 16667 1103
R2 15385 1554
R
TH
8000 645
V
TH
1.20 1.75 V
Note
11. Tested initially and after any design or process changes that may affect these parameters.
CY62167EV30 MoBL
®
Document Number: 38-05446 Rev. *N Page 6 of 19
Data Retention Characteristics
Over the Operating Range
Parameter Description Conditions Min Typ
[12]
Max Unit
V
DR
V
CC
for data retention 1.5 V
I
CCDR
[13]
Data retention current V
CC
= 1.5 V to 3.0 V,
CE
1
> V
CC
0.2 V or CE
2
< 0.2 V or
(BHE
and BLE) > V
CC
– 0.2 V,
V
IN
> V
CC
0.2 V or V
IN
< 0.2 V
Industrial 48-pin TSOP I 8 A
V
CC
= 1.5 V, CE
1
> V
CC
0.2 V or
CE
2
< 0.2 V or
(BHE
and BLE) > V
CC
– 0.2 V,
V
IN
> V
CC
0.2 V or V
IN
< 0.2 V
Industrial Other
packages
––10A
Automotive-A All packages 10 A
t
CDR
[14]
Chip deselect to data
retention time
0––
t
R
[15]
Operation recovery
time
45 ns
Data Retention Waveform
Figure 4. Data Retention Waveform
V
CC
(min)
V
CC
(min)
t
CDR
V
DR
>
1.5 V
DATA RETENTION MODE
t
R
CE
1
or
V
CC
BHE.BLE
CE
2
or
[16]
Notes
12. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ)
, T
A
= 25 °C.
13. Chip enables (CE
1
and CE
2
), byte enables (BHE and BLE) and BYTE must be tied to CMOS levels to meet the I
SB1
/ I
SB2
/ I
CCDR
spec. Other inputs can be left floating.
14. Tested initially and after any design or process changes that may affect these parameters.
15. Full device operation requires linear V
CC
ramp from V
DR
to V
CC(min)
> 100 s or stable at V
CC(min)
> 100 s.
16. BHE
.BLE is the AND of both BHE and BLE. Deselect the chip by either disabling the chip enable signals or by disabling both BHE and BLE.

CY62167EV30LL-45BVI

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
SRAM 16Mb 3V 45ns 1M x 16 LP SRAM
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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