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L9954LXPTR

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P35
Electrical specifications L9954LXP
16/35 Doc ID 16186 Rev 3
I
DOLK
3-state leakage current
V
CSN
= V
CC
,
0V < V
DO
< V
CC
-10 10 µA
C
DO
(1)
3-state input
capacitance
V
CSN
= V
CC
,
0V < V
CC
< 5.3 V
10 15 pF
1. Value of input capacity is not measured in production test. Parameter guaranteed by design.
Table 16. DO timing
Symbol Parameter Test condition Min. Typ. Max. Unit
t
r DO
DO rise time C
L
= 100 pF, I
load
= -1 mA - 80 140 ns
t
f DO
DO fall time C
L
= 100 pF, I
load
= 1 mA - 50 100 ns
t
en DO tri L
DO enable time
from 3-state to low-level
C
L
= 100 pF, I
load
= 1 mA
pull up load to V
CC
-100250ns
t
dis DO L tri
DO disable time
from low-level to 3-state
C
L
= 100 pF, I
load
= 4 mA
pull up load to V
CC
-380450ns
t
en DO tri H
DO enable time
from 3-state to high-
level
C
L
=100 pF, I
load
= -1 mA
pull down load to GND
-100250ns
t
dis DO H tri
DO disable time
from high-level to 3-
state
C
L
= 100 pF, I
load
= -4 mA pull
down load to GND
-380450ns
t
d DO
DO delay time
V
DO
< 0.3 V
CC
, V
DO
> 0.7 V
CC
,
C
L
= 100pF
- 50 250 ns
Table 17. CSN timing
Symbol Parameter Test condition Min. Typ. Max. Unit
t
CSN_HI,stb
CSN HI time, switching from
standby mode
Transfer of SPI command
to Input Register
20 - - µs
t
CSN_HI,min
CSN HI time, active mode
Transfer of SPI command
to input register
4--µs
Table 15. DO (continued)
Symbol Parameter Test condition Min. Typ. Max. Unit
L9954LXP Electrical specifications
Doc ID 16186 Rev 3 17/35
Figure 3. SPI - transfer timing diagram
Figure 4. SPI - input timing
12345670
01
12345670
12345670
01
01
CSN
CLK
DI
DO
Input
Data
Register
CSN high to low: DO enabled
time
DI: data will be accepted on the rising edge of CLK signal
time
time
time
time
DO: data will change on the falling edge of CLK signal
fault bit
CSN low to high: actual data is
transfered to output power switches
old data new data
232221201918
232221201918
232221201918
X
X
XX
XX
12345670
01
12345670
12345670
01
12345670
12345670
01
01
CSN
CLK
DI
DO
Input
Data
Register
CSN high to low: DO enabled
time
DI: data will be accepted on the rising edge of CLK signal
time
time
time
time
DO: data will change on the falling edge of CLK signal
fault bit
CSN low to high: actual data is
transfered to output power switches
old data new data
12345670
01
01
CSN
CLK
DI
DO
Input
Data
Register
CSN high to low: DO enabled
time
DI: data will be accepted on the rising edge of CLK signal
time
time
time
time
DO: data will change on the falling edge of CLK signal
fault bit
CSN low to high: actual data is
transfered to output power switches
old data new data
232221201918
232221201918
232221201918
X
X
XX
XX
0.8 VCC
0.8 VCC
0.8 VCC
0.2 VCC
0.2 VCC
0.2 VCC
Valid
Val id
CSN
CLK
DI
t
set CSN
t
CLKH
t
set CLK
t
CLKL
t
hold DI
t
set DI
Electrical specifications L9954LXP
18/35 Doc ID 16186 Rev 3
Figure 5. SPI - DO valid data delay time and valid time
Figure 6. SPI - DO enable and disable time
0
.
8
V
CC
0
.
8
V
CC
0
.
8
V
CC
0
.
2
V
C
C
0
.
2
V
C
C
0
.
2
V
CC
C
L
K
DO
(
l
o
w
t
o
h
i
g
h
)
DO
(high
to lo
w
)
0
.
5
V
CC
t
r in
t
r
D
O
t
f
DO
t
d DO
t
f
i
n
CSN
t
f in r in
t
DO
DO
en DO tri L
t t
dis DO L tri
50%
0.8 VCC
0.2 VCC
50%
50%
en DO tri H
t t
dis DO H tri
C = 100 pF
L
C = 100 pF
L
pull-up load to VCC
pull-down load to GND
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P35

L9954LXPTR

Mfr. #:
Buy L9954LXPTR
Manufacturer:
STMicroelectronics
Description:
Motor / Motion / Ignition Controllers & Drivers Door Actuator Driver 0.75A 1600mOhm
Lifecycle:
New from this manufacturer.
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