Data Sheet ADuCM320i
Table 7. SPI Slave Mode Timing (Phase Mode = 0)
Parameter Description Min Typ Max Unit
t
CS
CS
to SCLK edge 10 ns
t
SL
SCLK low pulse width
(SPIDIV + 1) × t
HCLK
ns
t
SH
SCLK high pulse width (SPIDIV + 1) × t
HCLK
ns
t
DAV
Data output valid after SCLK edge 20 ns
t
DSU
Data input setup time before SCLK edge 10 ns
t
DHD
Data input hold time after SCLK edge 10 ns
t
DF
Data output fall time
25
ns
t
DR
Data output rise time 25 ns
t
SR
SCLK rise time 1 ns
t
SF
SCLK fall time 1 ns
t
DOCS
Data output valid after
CS
edge 20 ns
t
SFS
CS
high after SCLK edge 10 ns
SCLK
(POLARITY = 0)
CS
SCLK
(POLARITY = 1)
t
SH
t
SL
t
SR
t
SF
t
SFS
MISO
MOSI
MSB IN BIT 6 TO BIT 1 LSB IN
t
DHD
t
DSU
MSB BIT 6 TO BIT 1 LSB
t
DOCS
t
DAV
t
DR
t
DF
t
CS
13422-006
F
igure 6. SPI Slave Mode Timing (Phase Mode = 0)
Rev. 0 | Page 15 of 26
ADuCM320i Data Sheet
Table 8. MDIO vs MCK Timing
Parameter Description Min Typ Max Unit
t
SETUP
MDIO setup before MCK edge 10 ns
t
HOLD
MDIO valid after MCK edge 10 ns
t
DELAY
Data output after MCK edge 100 ns
MCK
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
CFP
INPUT
MDIO
CFP
INPUT
MDIO
CFP
OUTPUT
t
SETUP
t
HOLD
t
DELAY
13422-007
F
igure 7. MDIO Timing
Rev. 0 | Page 16 of 26
Data Sheet ADuCM320i
ABSOLUTE MAXIMUM RATINGS
All requirements applicable to each pin must be met. Where
multiple limits apply to a pin each one must be met individually.
The limits apply according to the functionality of the pins at the
time. Pins that can be either analog or digital, that is, that have
two types indicated in the pin descriptions, must meet the limits
for both types. For pin types, see Table 10.
When powered up, all ground pins and ADC_REFN must be
connected together to a node referred to as GND in Table 9.
The limits that are listed must be reduced by any difference
between any GNDx pin. Also, AV DD3 must be connected to
AVDD4 and IOVDD1 must be connected to IOVDD3.
Table 9.
Parameter Rating
Any Pin to GND 0.3 V to +3.9 V
Any PVDDx Pin to GND −0.3 V to +2.8 V
MDIO
1
, MCK, and PRTADDR0 to
PRTADDR4 in MDIO Mode to GND
0.3 V to +2.1 V
Between Any of AVDDx, IOVDDx, and
VDD1 Pins
0.3 V to +0.3 V
Any Type I Pin to GND
2
0.3 V to IOVDDx + 0.3 V
Any Type AI or AO Pin to GND
3
0.3 V to AVDDx + 0.3 V
Any IDACx, CDAMPx, IDAC_TST, IREF to
GND
0.3 V to PVDDx + 0.3 V
ADC_REFP to GND 0.3 V to AVDDx + 0.3 V
Total Positive GPIO Pin Currents 0 mA to 30 mA
Total Negative GPIO Pin Currents 30 mA to 0 mA
Maximum Power Dissipation 1 W
Operating Ambient Temperature Range 40°C to +85°C
Storage Temperature Range 65°C to +160°C
Operating Junction Temperature Range 40°C to +120°C
ESD HBM 4 kV
ESD FICDM 1 kV
1
Note that this pin is always in MDIO mode.
2
This limit does not apply if no current can be drawn by external circuits on
IOVDDx because, in this case, IOV
DD
follows to a suitable level.
3
This limit does not apply if no current can be drawn by external circuits on
AVDDx because, in this case, AV
DD
follows to a suitable level.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Rev. 0 | Page 17 of 26

EVAL-ADUCM320IQSPZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Development Boards & Kits - ARM ADUCM320i Quick Start Plus Dev. Kit
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet