IDT
®
12-Output Differential Z-buffer for PCIe Gen2/3 and QPI 1682D- 11/19/15
9ZX21201
12-Output Differential Z-buffer for PCIe Gen2/3 and QPI
6
Electrical Characteristics - DIF 0.7V Current Mode Differential Outputs
T
A
= T
COM
; Supply Voltage V
DD/
V
DDA
= 3.3 V +/-5%
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES
Slew rate Trf Scope averaging on 1 2 4
V/ns
1, 2, 3
Slew rate matching
∆
Trf Slew rate matching, Scope averaging on 8 20
%
1, 2, 4
Voltage High VHigh 660 705 850 1
Voltage Low VLow -150 1 150 1
Max Voltage Vmax 725 1150 1
Min Voltage Vmin -300 -22 1
Vswin
Vswin
Scope avera
in
off 300 1407 mV 1, 2
Crossin
Volta
e (abs) Vcross_abs Scope avera
in
off 250 309 550 mV 1, 5
Crossing Voltage (var)
∆
-Vcross Scope averaging off 22 140 mV 1, 6
2
Measured from differential waveform
6
The total variation of all Vcross measurements in any particular system. Note that this is a subset of V_cross_min/max (V_cross
absolute) allowed. The intent is to limit Vcross induced modulation by setting V_cross_delta to be smaller than V_cross absolute.
mV
Statistical measurement on single-ended signal
using oscilloscope math function. (Scope
averaging on)
Measurement on single ended signal using
absolute value. (Scope averaging off)
mV
1
Guaranteed by design and characterization, not 100% tested in production. IREF = VDD/(3xR
R
). For R
R
= 412
Ω
(1%), I
REF
= 2.7mA.
I
OH
= 6.4 x I
REF
and V
OH
= 0.7V @ Z
O
=85
Ω
differential impedance.
3
Slew rate is measured through the Vswing voltage range centered around differential 0V. This results in a +/-150mV window around
differential 0V.
4
Matching applies to rising edge rate of Clock / falling edge rate of Clock#. It is measured in a +/-75mV window centered on the
average cross point where Clock rising meets Clock# falling. The median cross point is used to calculate the voltage thresholds the
oscilloscope uses for the edge rate calculations.
5
Vcross is defined as voltage where Clock = Clock# measured on a component test board and only applies to the differential rising
edge (i.e. Clock rising and Clock# falling).
Electrical Characteristics - Current Consumption
T
A
= T
COM
; Supply Voltage V
DD/
V
DDA
= 3.3 V +/-5%
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES
I
DDVDD
133MHz, C
L
= Full load; VDD rail, Zo=85
Ω 260
275 mA 1
I
DDVDDA
133MHz, C
L
= Full load; VDD rail, Zo=85
Ω 13
20 mA 1
I
DDVDDPD
Power Down, VDD rail, Zo=85
Ω 2
6mA1
I
DDVDDAPD
Power Down, VDD rail, Zo=85
Ω 1.3
2mA1
1
Guaranteed by design and characterization, not 100% tested in production.
Operating Current
Powerdown Current
Electrical Characteristics - DIF_IN Clock Input Parameters
T
AMB
=T
COM
unless otherwise indicated, Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES
Input Crossover Voltage -
DIF_IN
V
CROSS
Cross Over Voltage 150 900 mV 1
Input Swing - DIF_IN V
SWING
Differential value 300 mV 1
Input Slew Rate - DIF_IN dv/dt Measured differentially 0.4 8 V/ns 1,2
Input Leakage Current I
IN
V
IN
= V
DD ,
V
IN
=
GND -5 5 uA
Input Duty Cycle d
tin
Measurement from differential wavefrom 45 55 % 1
Input Jitter - Cycle to Cycle J
DI FI n
Differential Measurement 0 125 ps 1
1
Guaranteed by design and characterization, not 100% tested in production.
2
Slew rate measured through +/-75mV window centered around differential zero
