ICS932S203
IDT
TM
Frequency Generator with 133MHz Differential CPU Clocks 0601G—01/26/10
Frequency Generator with 133MHz Differential
CPU Clocks
1
DATASHEET
Pin Configuration
Recommended Application:
Servers based on Intel CK408 processors
Output Features:
4 Differential CPU Clock Pairs @ 3.3V
7 PCI (3.3V) @ 33.3MHz
3 PCI_F (3.3V) @ 33.3MHz
1 USB (3.3V) @ 48MHz
1 DOT (3.3V) @ 48MHz
1 REF (3.3V) @ 14.318MHz
1 3V66 (3.3V) @ 66.6MHz
1 VCH/3V66 (3.3V) @ 48MHz or 66.6MHz
3 66MHz_OUT/3V66 (3.3V) @ 66.6MHz_IN
or 66.6MHz
1 66MHz_IN/3V66 (3.3V) @ Input/66MHz
Features:
Supports spread spectrum modulation,
down spread 0 to -0.5%.
Efficient power management scheme through PD#
and PCI_STOP#.
Uses external 14.318MHz crystal
Stop clocks and functional control available through
SMBus interface.
Key Specifications:
CPU Output Jitter <150ps
3V66 Output Jitter <250ps
CPU Output Skew <150ps
56-Pin 300mil SSOP/TSSOP
* These inputs have 150K internal pull-up resistor to VDD.
Block Diagram
Functionality
1SF0SF
UPC
)zHM(
66V3
)zHM(
]0:2[ffuB66
]2:4[66V3
)zHM(
F_ICP
ICP
)zHM(
10 0016.66htapnI6.662/ni6.66
11 3.3316.66htapnI.662/ni
6.66
00 0016.666.663.33
01 3.3316.666.663.33
dim0 Z-iHZ-iHZ-iHZ-iH
dim1 2/klcT4/klcT4/klcT8/klcT
IDT
TM
Frequency Generator with 133MHz Differential CPU Clocks 0601G—01/26/10
ICS932S203
Frequency Generator with 133MHz Differential CPU Clocks
2
Pin Description
REBMUNNIPEMANNIPEPYTNOITPIRCSED
,62,91,41,8,1
05,64,73,23
DDVRWPylppusrewopV3.3
21XtupnIlatsyrC2XtupnilatsyrCzHM813.41
32X
latsyrC1X
tuptuO
tuptuo
latsyrCzHM813.41
5,6,7)0:2(F_KLCICPTUO .tnemeganamrewoprof#POTS_ICPybdetceffatonkcolcICPgninnureerF
,72,02
,51,9,4
74,14,63,13
DNGRWPylppusV3.3rofsnipdnuorG
,31,61,71,81
01,11,21
)0:6(KLCICPTUOstuptuokcolcICP
12,22,32
)
0:2(TUO_zHM66TUO.tupniNI_zHM66morfTUO_zHM66dereffubzHM66
)2:4(66V3TUOOCVlanretnimorf,skcolcecnereferzHM66
4
2
NI_zHM66NIskcolcICPdnaTUO_zHM66dereffubottupnizHM66
5_66V3TUOOCVlanretnimorf,kcolcecnereferzHM66
52#DPNI.woLe
vitcA.edomnwod-rewopsekovnI
82#DGRWP_ttV
NI
enimretedotdesuebortsevitisneslevelasitupniLTTVLV3.3sihT
ebotydaereradnadilaverastupni0LESITLUMdna]2
:0[SFnehw
delpmas
)wolevitca(
92ATADS
O/I
tnarelotV5yrtiucricsuBMSrofnipataD
03KLCS
NI
tnarelotV5yrtiucricsuBMSfonipkcolC
330_66V3TUOOCVlanretnimorf,skcolcecnereferzHM66
43#POTS_ICPNI
tpecxewoltup
ninehw,level0cigoltaskcolcKLCICPstlaH
gninnureerferahcihwF_KLCICP
53KLC_HCV/1_66V3TUO
hguorhtelbatcelestup
tuoV3.3
I
2
C
roOCVlanretnimorfzHM66ebot
)CSS-non(zHM84
83TOD_zHM84TUOTODrofkcolctuptuozHM84
93BSU_zHM84TUOBSUrofkcolctuptuo
zHM84
55,04)0:1(SFNInoitcelesedoMroftupniV3.3laicepS
24FERITUO
nipsihT.sriapKLCUPCehtroftnerrucecnereferehtsehsilbatsenipsihT
ehthsilbatseotredronidnuorgotdeitrotsisernoisicerpdexifaseriuqer
.tnerrucetairporppa
340
LESTLUMNI
otroirpdehctalyllanretninehtdnapu-rewopnodesnessitupni0LESTLUM
.skcolczHM813.41V3notuptuorofde
sugniebnipeht
35,15,84,44)0:3(CKLCUPCTUO
tnerruceraesehT.stuptuoUPCriaplaitnereffidfoskcolc"yratnemelpmoC
"
.saibegatlovrofderiuqererasrotsiserlanretxednastuptuo
45,25,94,54)0:3(TKLCUPCTUO
dnastuptuotnerruceraese
hT.stuptuoUPCriaplaitnereffidfoskcolc"eurT"
.saibegatlovrofderiuqererasrotsiserlanretxe
65FERTUO.kcolcecne
referzHM813.41
Power Groups
(Analog)
VDDA = PLL1
VDD48 = 48MHz, PLL
VDDREF = VDD for Xtal, POR
(Digital)
VDDPCI
VDD3V66
VDDCPU
IDT
TM
Frequency Generator with 133MHz Differential CPU Clocks 0601G—01/26/10
ICS932S203
Frequency Generator with 133MHz Differential CPU Clocks
3
Frequency Select Table
Host Swing Select Functions
0LESITLUM
tegraTdraoB
ZmreT/ecarT
,RecnerefeR
=ferI
V
DD
)rR*3(/
tuptuO
tnerruC
Z@hoV
0smho05
,%1122=rR
Am00.5=ferI
FERI*4=hoI05@V0.1
1smho05
,%1574=rR
Am23.2=ferI
FERI*6=h
oI05@V7.0
FS1 FS0 CPU 3V66 (1:0)
66Buff (2:0) /
3V66
(
4:2
)
66 In /
3V66_5
PCI REF
USB,
DO
T
note
1 0 100 66.6 66.6 In path 66.6 IN 66.6 in/2 14.318 48
Buffer
mode 66
1 1 133.3 66.6 66.6 In path 66.6 IN 66.6 in/2 14.318 48
Buffer
mode 66
0 0 100 66.6 66.6 66.6 33.3 14.318 48 Driven 66
0 1 133.3 66.6 66.6 66.6 33.3 14.318 48 Driven 66
mid
1
0 Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z
Tri-state
outputs
mid
1
1 Tclk/2 Tclk/4 Tclk/4 Tclk/4 Tclk/8 Tclk Tclk/2
Tclk is at
X1 input
1. Low=Vin < 0.8V, Mid=1.0V < Vin < 1.8V, High=Vin > 2.0V

ICS932S203AFLNT

Mfr. #:
Manufacturer:
Description:
IC FREQ GEN W/CPU CLOCK 56-SSOP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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