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ICS932S203AFLNT

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18
IDT
TM
Frequency Generator with 133MHz Differential CPU Clocks 0601G—01/26/10
ICS932S203
Frequency Generator with 133MHz Differential CPU Clocks
10
Electrical Characteristics- 3V66 - Buffered Mode: 3V66 [1:0] 66MHz_OUT [2:0]
T
A
= 0 - 70C; VDD=3.3V +/-5%; C
L
= 10-30 pF (unless otherwise specified)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Output Frequency F
O1
66.66 MHz
Output Impedance R
DSP1
1
V
O
= V
DD
*(0.5) 12 33 55 W
Output High Voltage V
OH
1
I
OH
= -1 mA 2.4 V
Output Low Voltage V
OL
1
I
OL
= 1 mA 0.55 V
Output High Current
I
OH
1
V
OH@MIN
= 1.0 V, V
OH@MAX
= 3.135 V -33 -33
mA
Output Low Current
I
OL
1
V
OL @MIN
= 1.95 V, V
OL @MAX
= 0.4 V 30 38
mA
Rise Time t
r1
1
V
OL
= 0.4 V, V
OH
= 2.4 V 0.5 1.44 2 ns
Fall Time t
f1
1
V
OH
= 2.4 V, V
OL
= 0.4 V 0.5 1.36 2 ns
Duty Cycle
d
t1
1
V
T
= 1.5 V 4554.655
%
Skew t
sk1
1
V
T
= 1.5 V 3V66 [1:0] 105 250 ps
Jitter t
j
c
y
c-c
y
c
1
V
T
= 1.5 V 3V66 [1:0] 121 300 ps
Skew t
sk1
1
V
T
= 1.5 V 66MHz_OUT [2:0] 169 250 ps
Jitter
t
jcyc-cyc
1
V
T
= 1.5 V 66MHz_OUT [2:0]
89 300 ps
1
Guaranteed by design, not 100% tested in production.
Electrical Characteristics - 3V66 -Un-Buffered Mode: 3V66 [5:0]
T
A
= 0 - 70°C; VDD=3.3V +/-5%; C
L
= 10-30 pF (unless otherwise specified)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Output Frequency F
O1
66.66 MHz
Output Impedance R
DSP1
1
V
O
= V
DD
*(0.5) 12 33 55
Ω
Output High Voltage V
OH
1
I
OH
= -1 mA 2.4 V
Output Low Voltage V
OL
1
I
OL
= 1 mA 0.55 V
Output High Current
I
OH
1
V
OH@MIN
= 1.0 V, V
OH@MAX
= 3.135 V -33 -33
mA
Output Low Current
I
OL
1
V
OL @MIN
= 1.95 V, V
OL @MAX
= 0.4 V 30 38
mA
Rise Time t
r1
1
V
OL
= 0.4 V, V
OH
= 2.4 V 0.5 1.38 2 ns
Fall Time t
f1
1
V
OH
= 2.4 V, V
OL
= 0.4 V 0.5 1.45 2 ns
Duty Cycle
d
t1
1
V
T
= 1.5 V 45 54.4 55
%
Skew t
sk1
1
V
T
= 1.5 V 90 250 ps
Jitter
t
jcyc-cyc
1
V
T
= 1.5 V 3V66
128 250 ps
1
Guaranteed by design, not 100% tested in production.
IDT
TM
Frequency Generator with 133MHz Differential CPU Clocks 0601G—01/26/10
ICS932S203
Frequency Generator with 133MHz Differential CPU Clocks
11
Electrical Characteristics - REF
T
A
= 0 - 70°C; VDD=3.3V +/-5%; C
L
= 10-20 pF (unless otherwise specified)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Output Frequency F
O1
MHz
Output Impedance R
DSP1
1
V
O
= V
DD
*(0.5) 20 48 60
Ω
Output High Voltage V
OH
1
I
OH
= -1 mA 2.4 V
Output Low Voltage V
OL
1
I
OL
= 1 mA 0.4 V
Output High Current
I
OH
1
V
OH@MIN
= 1.0 V, V
OH@MAX
= 3.135 V -29 -23
mA
Output Low Current
I
OL
1
V
OL @MIN
= 1.95 V, V
OL @MAX
= 0.4 V 29 27
mA
Rise Time t
r1
1
V
OL
= 0.4 V, V
OH
= 2.4 V 1 1.25 2 ns
Fall Time t
f1
1
V
OH
= 2.4 V, V
OL
= 0.4 V 1 1.15 2 ns
Duty Cycle
d
t1
1
V
T
= 1.5 V 45 53 55
%
Jitter
t
jcyc-cyc
1
V
T
= 1.5 V
723 1000 ps
1
Guaranteed by design, not 100% tested in production.
Electrical Characteristics - VCH, 48MHz DOT, 48MHz, USB
T
A
= 0 - 70°C; VDD=3.3V +/-5%; C
L
= 10-20 pF (unless otherwise specified)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Output Frequency F
O1
48 MHz
Output Impedance R
DSP1
1
V
O
= V
DD
*(0.5) 20 48 60
Ω
Output High Voltage V
OH
1
I
OH
= -1 mA 2.4 V
Output Low Voltage V
OL
1
I
OL
= 1 mA 0.4 V
Output High Current
I
OH
1
V
OH@MIN
= 1.0 V, V
OH@MAX
= 3.135 V -29 -23
mA
Output Low Current
I
OL
1
V
OL @MIN
= 1.95 V, V
OL @MAX
= 0.4 V 29 27
mA
48DOT Rise Time t
r1
1
V
OL
= 0.4 V, V
OH
= 2.4 V 0.5 0.6 1 ns
48DOT Fall Time t
f1
1
V
OH
= 2.4 V, V
OL
= 0.4 V 0.5 0.8 1 ns
VCH 48 USB Rise Time t
r1
1
V
OL
= 0.4 V, V
OH
= 2.4 V 1 1.2 2 ns
VCH 48 USB Fall Time t
f1
1
V
OH
= 2.4 V, V
OL
= 0.4 V 1 1.3 2 ns
48 DOT Duty Cycle
d
t1
1
V
T
= 1.5 V 45 52.8 55
%
VCH 48 USB Duty Cycle
d
t1
1
V
T
= 1.5 V 45 53.5 55
%
48 DOT Jitter t
j
c
y
c-c
y
c
1
V
T
= 1.5 V 183 350 ps
VCH Jitter
t
jcyc-cyc
1
V
T
= 1.5 V
223 350 ps
1
Guaranteed by design, not 100% tested in production.
IDT
TM
Frequency Generator with 133MHz Differential CPU Clocks 0601G—01/26/10
ICS932S203
Frequency Generator with 133MHz Differential CPU Clocks
12
General SMBus serial interface information
The information in this section assumes familiarity with SMBus programming.
For more information, contact ICS for an SMBus software program.
How to Write:
• Controller (host) sends a start bit.
• Controller (host) sends the write address D2
(H)
• ICS clock will acknowledge
• Controller (host) sends a dummy command code
• ICS clock will acknowledge
• Controller (host) sends a dummy byte count
• ICS clock will acknowledge
• Controller (host) starts sending first byte (Byte 0)
through byte 5
• ICS clock will acknowledge each byte one at a time.
• Controller (host) sends a Stop bit
How to Read:
• Controller (host) will send start bit.
• Controller (host) sends the read address D3
(H)
• ICS clock will acknowledge
• ICS clock will send the byte count
• Controller (host) acknowledges
• ICS clock sends first byte (Byte 0) through byte 6
• Controller (host) will need to acknowledge each byte
• Controller (host) will send a stop bit
1. The ICS clock generator is a slave/receiver, SMBus component. It can read back the data stored in the latches for
verification. Read-Back will support Intel PIIX4 "Block-Read" protocol.
2. The data transfer rate supported by this clock generator is 100K bits/sec or less (standard mode)
3. The input is operating at 3.3V logic levels.
4. The data byte format is 8 bit bytes.
5. To simplify the clock generator SMBus interface, the protocol is set to use only "Block-Writes" from the controller. The
bytes must be accessed in sequential order from lowest to highest byte with the ability to stop after any complete byte
has been transferred. The Command code and Byte count shown above must be sent, but the data is ignored for those
two bytes. The data is loaded until a Stop sequence is issued.
6. At power-on, all registers are set to a default condition, as shown.
Notes:
Controller (Host) ICS (Slave/Receiver)
Start Bit
Address
D2
(H )
A
CK
Dummy Command Code
A
CK
Dummy Byte Count
ACK
Byte 0
ACK
Byte 1
ACK
Byte 2
ACK
Byte 3
ACK
Byte 4
ACK
Byte 5
ACK
Byte 6
ACK
Stop Bit
How to Write:
Controller (Host) ICS (Slave/Receiver)
Start Bit
Address
D3
(H )
A
CK
Byte Count
ACK
Byte 0
ACK
Byte 1
ACK
Byte 2
ACK
Byte 3
ACK
Byte 4
ACK
Byte 5
ACK
Byte 6
ACK
Stop Bit
How to Read:
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18

ICS932S203AFLNT

Mfr. #:
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Description:
IC FREQ GEN W/CPU CLOCK 56-SSOP
Lifecycle:
New from this manufacturer.
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