IDT
TM
Frequency Generator with 133MHz Differential CPU Clocks 0601G—01/26/10
ICS932S203
Frequency Generator with 133MHz Differential CPU Clocks
7
Absolute Maximum Ratings
Supply Voltage 5.5 V
Logic Inputs GND –0.5 V to V
DD
+0.5 V
Ambient Operating Temperature 0°C to +70°C
Case Temperature 115°C
Storage Temperature –65°C to +150°C
Stresses above those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
T
A
= 0 - 70°C; Supply Voltage V
DD
= 3.3 V +/-5%
PARAMETER
S
YMBO
L
CONDITIONS MIN TYP MAX UNITS
Input High Voltage V
IH
2V
DD
+ 0.3 V
Input Low Voltage V
IL
V
SS
- 0.3 0.8 V
Input High Current I
IH
V
IN
= V
DD
-5 5 mA
I
IL1
V
IN
= 0 V; Inputs with no pull-up resistors -5 mA
I
IL2
V
IN
= 0 V; Inputs with pull-up resistors -200
Operating Supply Current I
DD3.3OP
C
L
= Full load; Select @ 100 MHz 229 230 360
mA
I
DD3.3OP
C
L
=Full load; Select @ 133 MHz 220 233 360
mA
Powerdown Current I
DD3.3PD
60
mA
Input Frequency F
i
V
DD
= 3.3 V 14.318 MHz
Pin Inductance L
p
in
7nH
C
IN
Logic Inputs 5 pF
C
OUT
Output pin capacitance 6 pF
C
INX
X1 & X2 pins 27 45 pF
Transition time
1
T
trans
To 1st crossing of target frequency 3 ms
Settlin
g
time
1
T
s
From 1st crossing to 1% target frequency 3 ms
Clk Stabilization
1
T
STAB
From V
DD
= 3.3 V to 1% target frequency 3 ms
t
PZH
,t
PZL
Output enable delay (all outputs) 1 10 ns
t
PHZ
,t
PLZ
Output disable delay (all outputs) 1 10 ns
1
Guaranteed by design, not 100% tested in production.
Delay
1
Input Capacitance
1
Input Low Current
IDT
TM
Frequency Generator with 133MHz Differential CPU Clocks 0601G—01/26/10
ICS932S203
Frequency Generator with 133MHz Differential CPU Clocks
8
Electrical Characteristics - CPU 0.7V Current Mode Differential Pair
T
A
= 0 - 70°C; V
DD
= 3.3 V +/-5%; C
L
=2pF
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES
Current Source Output
Im
p
edance
Zo
1
V
O
= V
x
3000
1
Voltage High VHigh 660 770 850 1
Voltage Low VLow -150 5 150 1
Max Volta
e Vovs 756 1150 1
Min Volta
g
e Vuds -300 -7 1
Crossin
g
Volta
g
e
(
abs
)
Vcross
(
abs
)
250 350 550 mV 1
Crossing Voltage (var) d-Vcross
Variation of crossing over all
ed
g
es
12 140 mV 1
Lon
g
Accurac
y
pp
m see T
p
eriod min-max values -300 300
pp
m1,2
200MHz nominal 4.9985 5.0015 ns 2
200MHz s
p
read 4.9985 5.0266 ns 2
166.66MHz nominal 5.9982 6.0018 ns 2
166.66MHz s
p
read 5.9982 6.0320 ns 2
133.33MHz nominal 7.4978 7.5023 ns 2
133.33MHz s
p
read 7.4978 5.4000 ns 2
100.00MHz nominal 9.9970 10.0030 ns 2
100.00MHz s
p
read 9.9970 10.0533 ns 2
200MHz nominal 4.8735 ns 1,2
166.66MHz nominal/s
p
read 5.8732 ns 1,2
133.33MHz nominal/s
p
read 7.3728 ns 1,2
100.00MHz nominal/s
p
read 9.8720 ns 1,2
Rise Time
t
r
V
OL
= 0.175V, V
OH
= 0.525V
175 332 700 ps 1
Fall Time
t
f
V
OH
= 0.525V V
OL
= 0.175V
175 344 700 ps 1
Rise Time Variation
d-t
r
30 125 ps 1
Fall Time Variation
d-t
f
30 125 ps 1
Duty Cycle
d
t3
Measurement from differential
wavefrom
45 49 55 % 1
Skew
t
sk3
V
T
= 50%
8 100 ps 1
Jitter, Cycle to cycle
t
jcyc-cyc
Measurement from differential
wavefrom
60 150 ps 1
1
Guaranteed b
y
desi
g
n, not 100% tested in
p
roduction.
2
All Long Term Accuracy and Clock Period specifications are guaranteed with the assumption that Ref output is at
14.31818MHz
TperiodAverage period
Absolute min period
T
absmin
Statistical measurement on single
ended signal using oscilloscope
math function.
mV
Measurement on single ended
signal using absolute value.
mV
IDT
TM
Frequency Generator with 133MHz Differential CPU Clocks 0601G—01/26/10
ICS932S203
Frequency Generator with 133MHz Differential CPU Clocks
9
Electrical Characteristics - PCICLK Un-Buffered Mode
T
A
= 0 - 70°C; VDD=3.3V +/-5%; C
L
= 10-30 pF (unless otherwise specified)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Output Frequency F
O1
MHz
Output Impedance R
DSP1
1
V
O
= V
DD
*(0.5) 12 33 55
Output High Voltage V
OH
1
I
OH
= -1 mA 2.4 V
Output Low Voltage V
OL
1
I
OL
= 1 mA 0.55 V
Output High Current
I
OH
1
V
OH@MIN
= 1.0 V, V
OH@MAX
= 3.135 V -33 -33
mA
Output Low Current
I
OL
1
V
OL @MIN
= 1.95 V, V
OL @MAX
= 0.4 V 30 38
mA
Rise Time t
r1
1
V
OL
= 0.4 V, V
OH
= 2.4 V 0.5 1.32 0.5to 2 ns
Fall Time t
f1
1
V
OH
= 2.4 V, V
OL
= 0.4 V 0.5 1.39 0.5 to 2 ns
Duty Cycle
d
t1
1
V
T
= 1.5 V 45 52 55
%
Skew t
sk1
1
V
T
= 1.5 V 247 500 ps
Jitter,cycle to cyc
t
jcyc-cyc
1
V
T
= 1.5 V
111 500 ps
1
Guaranteed by design, not 100% tested in production.
Electrical Characteristics - PCICLK Buffered Mode
T
A
= 0 - 70°C; VDD=3.3V +/-5%; C
L
= 10-30 pF (unless otherwise specified)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Output Frequency F
O1
MHz
Output Impedance R
DSP1
1
V
O
= V
DD
*(0.5) 12 33 55
Output High Voltage V
OH
1
I
OH
= -1 mA 2.4 V
Output Low Voltage V
OL
1
I
OL
= 1 mA 0.55 V
Output High Current
I
OH
1
V
OH@MIN
= 1.0 V, V
OH@MAX
= 3.135 V -33 -33
mA
Output Low Current
I
OL
1
V
OL @MIN
= 1.95 V, V
OL @MAX
= 0.4 V 30 38
mA
Rise Time t
r1
1
V
OL
= 0.4 V, V
OH
= 2.4 V 0.5 1.29 0.5to 2 ns
Fall Time t
f1
1
V
OH
= 2.4 V, V
OL
= 0.4 V 0.5 1.32 0.5 to 2 ns
Duty Cycle
d
t1
1
V
T
= 1.5 V 45 51.9 55
%
Skew t
sk1
1
V
T
= 1.5 V 209 500 ps
Jitter,cycle to cyc
t
jcyc-cyc
1
V
T
= 1.5 V
107 500 ps
1
Guaranteed by design, not 100% tested in production.

ICS932S203AFLNT

Mfr. #:
Manufacturer:
Description:
IC FREQ GEN W/CPU CLOCK 56-SSOP
Lifecycle:
New from this manufacturer.
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