NCP12700
www.onsemi.com
10
Figure 4. Startup Timing Diagram
Output
Voltage
time
V
CC(OFF)
V
CC(REG)
V
CC
V
IN
= 12 V
V
CC(ON)
V
CC
= 3 V
I
VIN
I
VIN
= 30 mA
I
VIN
~ 10 mA
I
VIN
= I
CC
Once the device has begun delivering drive pulses it will
remain active as long as V
CC
remains above the V
CC(OFF)
threshold of 6.5 V. Either the auxiliary winding or the HV
startup regulator will provide the bias necessary to keep V
CC
above this level. If V
CC
does drop below the V
CC(OFF)
threshold the controller will inhibit drive pulses, the device
will reset and once again enter a low quiescent state. This
should only occur if the input voltage to the converter has
been removed but can also be an indication of excessive
external loading on V
CC
.
Input Voltage UVLO Detection
The NCP12700 features line voltage UVLO detection to
ensure that the converter becomes operational only after
meeting a minimum input voltage threshold thereby
protecting the converter from thermal stress at low input
voltages. A functional block diagram of the UVLO
detection circuitry is shown in Figure 5. The input line
voltage is monitored through a resistor divider network
allowing the user to set the thresholds for when to enable and
disable the converter. Typical pull−down resistors in the
divider network will be in the range of 5 – 20 kW and pull−up
resistors will typically be in the range of 50 – 500 kW.
External capacitive filtering on the order of 10 nF is also
advisable.
When input voltage is initially applied to the converter the
device will be in a shutdown/reset (SHDN) state until the
UVLO voltage crosses the V
STBY(th)
threshold of 0.5 V. In
the SHDN state the device consumption will be limited to
the I
CC(SHDN)
value of 50 mA. When the UVLO voltage goes
above V
STBY(th)
the device transitions into standby mode
and the consumption increases to the I
CC(STBY)
limit of
750 mA maximum. The low current consumption in the
shutdown and standby modes allow V
CC
to rapidly charge
to the V
CC(ON)
threshold.
Once V
CC
has charged to V
CC(ON)
the device will enable
drive pulses when the UVLO voltage exceeds the V
UVLO(th)
of 0.8 V and disables drive pulses when the UVLO voltage
falls below 0.8 V by V
UVLO(HYS)
. Prior to enabling drive
pulses the device also activates a pull−down current source,
I
UVLO(HYS)
, of 5 mA. The current source works in
combination with V
UVLO(HYS)
to set the input voltage
hysteresis for enabling and disabling switching operation of
the converter. A resistor, R
UVLO(HYS)
, can be used to
provide additional hysteresis between the enable and disable
thresholds. Equation 1 and Equation 2 can be used to
calculate the necessary component values in the resistor
divider network.
