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74HCT259D-Q100,118

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
74HC_HCT259_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 30 July 2012 15 of 20
NXP Semiconductors
74HC259-Q100; 74HCT259-Q100
8-bit addressable latch
Fig 14. Package outline SOT403-1 (TSSOP16)
UNIT A
1
A
2
A
3
b
p
cD
(1)
E
(2) (1)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
0.65
6.6
6.2
0.4
0.3
0.40
0.06
8
0
o
o
0.13 0.10.21
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT403-1 MO-153
99-12-27
03-02-18
w M
b
p
D
Z
e
0.25
18
16
9
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
H
E
E
c
v M
A
X
A
y
0 2.5 5 mm
scale
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
A
max.
1.1
pin 1 index
74HC_HCT259_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 30 July 2012 16 of 20
NXP Semiconductors
74HC259-Q100; 74HCT259-Q100
8-bit addressable latch
Fig 15. Package outline SOT763-1 (DHVQFN16)
terminal 1
index area
0.51
A
1
E
h
b
UNIT
ye
0.2
c
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
3.6
3.4
D
h
2.15
1.85
y
1
2.6
2.4
1.15
0.85
e
1
2.5
0.30
0.18
0.05
0.00
0.05 0.1
DIMENSIONS (mm are the original dimensions)
SOT763-1 MO-241 - - -- - -
0.5
0.3
L
0.1
v
0.05
w
0 2.5 5 mm
scale
SOT763-1
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
16 terminals; body 2.5 x 3.5 x 0.85 mm
A
(1)
max.
A
A
1
c
detail X
y
y
1
C
e
L
E
h
D
h
e
e
1
b
27
15
10
9
8
1
16
X
D
E
C
B
A
terminal 1
index area
AC
C
B
v
M
w
M
E
(1)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
D
(1)
02-10-17
03-01-27
74HC_HCT259_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 30 July 2012 17 of 20
NXP Semiconductors
74HC259-Q100; 74HCT259-Q100
8-bit addressable latch
13. Abbreviations
14. Revision history
Table 11. Abbreviations
Acronym Description
CDM Charged Device Model
CMOS Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
LSTTL Low-power Schottky Transistor-Transistor Logic
MM Machine Model
TTL Transistor-Transistor Logic
Table 12. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74HC_HCT259_Q100 v.1 20120730 Product data sheet - -
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

74HCT259D-Q100,118

Mfr. #:
Buy 74HCT259D-Q100,118
Manufacturer:
Nexperia
Description:
Latches 74HCT259D-Q100/SO16/REEL 13" Q
Lifecycle:
New from this manufacturer.
Delivery:
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