4©2016 Integrated Device Technology, Inc. Revision D September 27, 2016
83905 Datasheet
Table 4D. Power Supply DC Characteristics, V
DD
= 3.3V ± 5%, V
DDO
= 2.5V ± 5%, T
A
= 0°C to 70°C
Table 4E. Power Supply DC Characteristics, 3.3V ± 5%, V
DDO
= 1.8V ± 0.2V, T
A
= 0°C to 70°C
Table 4F. Power Supply DC Characteristics, V
DD
= 2.5V ± 5%, V
DDO
= 1.8V ± 0.2V, T
A
= 0°C to 70°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Power Supply Voltage 3.135 3.3 3.465 V
V
DDO
Output Supply Voltage 2.375 2.5 2.625 V
I
DD
Power Supply Current ENABLE [1:2] = 00 10 mA
I
DDO
Output Supply Current ENABLE [1:2] = 00 4 mA
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Power Supply Voltage 3.135 3.3 3.465 V
V
DDO
Output Supply Voltage 1.6 1.8 2.0 V
I
DD
Power Supply Current ENABLE [1:2] = 00 10 mA
I
DDO
Output Supply Current ENABLE [1:2] = 00 3 mA
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Power Supply Voltage 2.375 2.5 2.625 V
V
DDO
Output Supply Voltage 1.6 1.8 2.0 V
I
DD
Power Supply Current ENABLE [1:2] = 00 8 mA
I
DDO
Output Supply Current ENABLE [1:2] = 00 3 mA
5©2016 Integrated Device Technology, Inc. Revision D September 27, 2016
83905 Datasheet
Table 4G. LVCMOS/LVTTL DC Characteristics, T
A
= 0°C to 70°C
NOTE 1: Outputs terminated with 50 to V
DDO
/2. See Parameter Measurement Information, Output Load Test Circuit diagrams.
Table 5. Crystal Characteristics
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input
High Voltage
ENABLE1,
ENABLE2
V
DD
= 3.3V ± 5% 2 V
DD
+ 0.3 V
V
DD
= 2.5V ± 5% 1.7 V
DD
+ 0.3 V
V
DD
= 1.8V ± 0.2V 0.65 * V
DD
V
DD
+ 0.3 V
V
IL
Input
Low Voltage
ENABLE1,
ENABLE2
V
DD
= 3.3V ± 5% -0.3 0.8 V
V
DD
= 2.5V ± 5% -0.3 0.7 V
V
DD
= 1.8V ± 0.2V -0.3 0.35 * V
DD
V
V
OH
Output High Voltage
V
DDO
= 3.3V ± 5%; NOTE 1 2.6 V
V
DDO
= 2.5V ± 5%; I
OH
= -1mA 2.0 V
V
DDO
= 2.5V ± 5%; NOTE 1 1.8 V
V
DDO
= 1.8V ± 0.2V; NOTE 1 V
DDO
- 0.3 V
V
OL
Output Low Voltage; NOTE 1
V
DDO
= 3.3V ± 5%; NOTE 1 0.5 V
V
DDO
= 2.5V ± 5%; I
OL
= 1mA 0.4 V
V
DDO
= 2.5V ± 5%; NOTE 1 0.45 V
V
DDO
= 1.8V ± 0.2V; NOTE 1 0.35 V
Parameter Test Conditions Minimum Typical Maximum Units
Mode of Oscillation Fundamental
Frequency 10 40 MHz
Equivalent Series Resistance (ESR) 50
Shunt Capacitance 7pF
Drive Level 1mW
6©2016 Integrated Device Technology, Inc. Revision D September 27, 2016
83905 Datasheet
AC Electrical Characteristics
Table 6A. AC Characteristics, V
DD
= V
DDO
= 3.3V ± 5%, T
A
= 0°C to 70°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the
device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after
thermal equilibrium has been reached under these conditions.
All parameters measured at ƒ f
MAX
using a crystal input unless noted otherwise.
Terminated at 50 to V
DDO
/2.
NOTE 1: XTAL_IN can be overdriven by a single-ended LVCMOS signal. Please refer to Application Information section.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V
DDO
/2.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 4: See phase noise plot.
NOTE 5: These parameters are guaranteed by characterization. Not tested in production.
Table 6B. AC Characteristics, V
DD
= V
DDO
= 2.5V ± 5%, T
A
= 0°C to 70°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the
device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after
thermal equilibrium has been reached under these conditions.
All parameters measured at ƒ f
MAX
using a crystal input unless noted otherwise.
Terminated at 50 to V
DDO
/2.
NOTE 1: XTAL_IN can be overdriven by a single-ended LVCMOS signal. Please refer to Application Information section.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V
DDO
/2.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 4: See phase noise plot.
NOTE 5: These parameters are guaranteed by characterization. Not tested in production.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency
Using External Crystal 10 40 MHz
Using External Clock
Source NOTE 1
DC 100 MHz
tsk(o) Output Skew; NOTE 2, 3 80 ps
tjit(Ø) RMS Phase Jitter (Random); NOTE 4
25MHz, Integration Range:
100Hz – 1MHz
0.13 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 200 800 ps
odc Output Duty Cycle 48 52 %
t
EN
Output Enable
Time; NOTE 5
ENABLE1 4 cycles
ENABLE2 4 cycles
t
DIS
Output Disable
Time; NOTE 5
ENABLE1 4 cycles
ENABLE2 4 cycles
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency
Using External Crystal 10 40 MHz
Using External Clock
Source NOTE 1
DC 100 MHz
tsk(o) Output Skew; NOTE 2, 3 80 ps
tjit RMS Phase Jitter (Random); NOTE 4
25MHz, Integration Range:
100Hz – 1MHz
0.26 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 200 800 ps
odc Output Duty Cycle 47 53 %
t
EN
Output Enable
Time; NOTE 5
ENABLE1 4 cycles
ENABLE2 4 cycles
t
DIS
Output Disable
Time; NOTE 5
ENABLE1 4 cycles
ENABLE2 4 cycles

83905AMLF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Buffer Low Skew 1:5 Fanout Buffer
Lifecycle:
New from this manufacturer.
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