LT3755/LT3755-1/LT3755-2
7
37551fd
pin FuncTions
PWMOUT (Pin 1/Pin 11): Buffered Version of PWM Signal
for Driving LED Load Disconnect NMOS or Level Shift.
This pin also serves in a protection function for the FB
overvoltage condition—will toggle if the FB input is greater
than the FB regulation voltage (V
FB
) plus 60mV (typical).
The PWMOUT pin is driven from INTV
CC
. Use of a FET with
gate cut-off voltage higher than 1V is recommended.
FB (Pin 2/Pin 12): Voltage Loop Feedback Pin. FB is
intended for constant-voltage regulation or for LED protec-
tion/open LED detection. The internal transconductance
amplifier with output VC will regulate FB to 1.25V (nominal)
through the DC/DC converter. If the FB input is regulating
the loop, the OPENLED pull-down is asserted. This ac-
tion may signal an open LED fault. If FB is driven above
the FB threshold (by an external power supply spike, for
example), the OPENLED pull-down will be de-asserted and
the PWMOUT pin will be driven low to protect the LEDs
from an overcurrent event. Do not leave the FB pin open.
If not used, connect to GND.
I
SN (Pin 3/Pin 13): Connection Point for the Negative
Terminal of the Current Feedback Resistor. If ISN is greater
than 2.9V, the LED current can be programmed by I
LED
=
100mV/R
LED
when V
CTRL
> 1.2V or I
LED
= (V
CTRL
–100mV)/
(10 • R
LED
) when V
CTRL
≤ 1V. Input bias current is typi-
cally 25µA. Below 3V, ISN is an input to the short-circuit
protection feature that forces GATE to 0V if ISP exceeds
ISN by more than 150mV (typ).
ISP (Pin 4/Pin 14): Connection Point for the Positive
Terminal of the Current Feedback Resistor. Input bias
current is dependent upon CTRL pin voltage as shown
in
the
TPC. ISP is an input to the short-circuit protection
feature when ISN is less than 3V.
VC (Pin 5/Pin 15): Transconductance Error Amplifier
Output Pin Used to Stabilize the Voltage Loop with an RC
Network. This pin is high impedance when PWM is low, a
feature that stores the demand current state variable for
the next PWM high transition. Connect a capacitor between
this pin and GND; a resistor in series with the capacitor is
recommended for fast transient response.
(MSOP/QFN)
Typical perForMance characTerisTics
T
A
= 25°C, unless otherwise noted.
INTV
CC
Dropout Voltage
vs Current, Temperature
ISP/ISN Input Bias Current
vs CTRL Voltage
CTRL (V)
37551 G19
0 0.5 1 1.5 2
0
10
40
20
30
INPUT BIAS CURRENT (µA)
ISP
ISN
LT3755/LT3755-1/LT3755-2
8
37551fd
CTRL (Pin 6/Pin 16): Current Sense Threshold Adjustment
Pin. Regulating threshold V
(ISP ISN)
is 1/10th V
CTRL
plus
an offset for 0V < V
CTRL
< 1V. For V
CTRL
> 1.2V the current
sense threshold is constant at the full-scale value of 100mV.
For 1V < V
CTRL
< 1.2V, the dependence of current sense
threshold upon V
CTRL
transitions from a linear function
to a constant value, reaching 98% of full-scale value by
V
CTRL
= 1.1V. Do not leave this pin open.
V
REF
(Pin 7/Pin 1): Voltage Reference Output Pin, Typically
2V. This pin drives a resistor divider for the CTRL pin, either
for analog dimming or for temperature limit/compensation
of LED load. Can supply up to 100μA.
PWM (Pin 8/Pin 2): A signal low turns off switcher, idles
oscillator and disconnects VC pin from all internal loads.
PWMOUT pin follows PWM pin. PWM has an internal
pull-down resistor. If not used, connect to INTV
CC
.
OPENLED (Pin 9/Pin 3, LT3755 and LT3755-2): An open-
collector pull-down on OPENLED asserts if the FB input
is greater than the FB regulation threshold minus 50mV
(typical). To function, the pin requires an external pull-up
current less than 1mA. When the PWM input is low and
the DC/DC converter is idle, the OPENLED condition is
latched to the last valid state when the PWM input was
high. When PWM input goes high again, the OPENLED
pin will be updated. This pin may be used to report an
open LED fault.
SYNC (Pin 9/Pin 3, LT3755-1 Only): The SYNC pin is used
to synchronize the internal oscillator to an external logic
level signal. The R
T
resistor should be chosen to program
an internal switching frequency 20% slower than the SYNC
pulse frequency. Gate turn-on occurs a fixed delay after
the rising edge of SYNC. For best PWM performance, the
PWM rising edge should occur at least 200ns before the
SYNC rising edge. Use a 50% duty cycle waveform to
drive this pin. This pin replaces OPENLED on LT3755-1
option parts. If not used, tie this pin to GND.
SS (Pin 10/Pin 4): Soft-Start Pin. This pin modulates
oscillator frequency and compensation pin voltage (VC)
clamp. The soft-start interval is set with an external capaci-
tor. The pin has a 10µA (typical) pull-up current source
to an internal 2.5V rail. The soft-start pin is reset to GND
by an undervoltage condition (detected by SHDN/UVLO
pin) or thermal limit.
RT (Pin 11/Pin 5): Switching Frequency Adjustment Pin.
Set the frequency using a resistor to GND (for resistor
values, see the Typical Performance curve or Table 1).
Do not leave the RT pin open.
SHDN/UVLO (Pin 12/Pin 6): Shutdown and Undervoltage
Detect Pin. An accurate 1.22V falling threshold with ex-
ternally programmable hysteresis detects when power is
OK to enable switching. Rising hysteresis is generated
by the external resistor divider and an accurate internal
2.1µA pull-down current. Above the threshold (but below
6V), SHDN/UVLO
input
bias current is sub-µA. Below the
falling threshold, a 2.1µA pull-down current is enabled so
the user can define the hysteresis with the external resis-
tor selection. An undervoltage condition resets soft-start.
Tie to 0.4V, or less, to disable the device and reduce V
IN
quiescent current below 1µA.
INTV
CC
(Pin 13/Pin 7): Regulated Supply for Internal
Loads, GATE Driver and PWMOUT Driver. Supplied from
V
IN
and regulates to 7.15V (typical). INTV
CC
must be
bypassed with a 4.7µF capacitor placed close to the pin.
Connect INTV
CC
directly to V
IN
if V
IN
is always less than
or equal to 8V.
V
IN
(Pin 14/Pin 8): Input Supply Pin. Must be locally
bypassed with a 0.22µF (or larger) capacitor placed close
to the IC.
SENSE (Pin 15/Pin 9): The current sense input for the
control loop. Kelvin connect this pin to the positive ter-
minal of the switch current sense resistor, R
SENSE
, in the
source of the NFET. The negative terminal of the current
sense resistor should be Kelvin connected to the GND
plane of the IC.
GATE (Pin 16/Pin 10): N-channel FET Gate Driver Output.
Switches between INTV
CC
and GND. Driven to GND during
shutdown, fault or idle states.
Exposed Pad (Pin 17/Pin 17): Ground. This pin also serves
as current sense input for control loop, sensing negative
terminal of current sense resistor. Solder the Exposed Pad
directly to ground plane.
pin FuncTions
(MSOP/QFN)
LT3755/LT3755-1/LT3755-2
9
37551fd
block DiagraM
+
+
+
+
+
+
+
A1
A3
A6
+
+
FREQ
PROG
1.25V
SSCLAMP
1.1V
CTRL
V
REF
SHDN/UVLO
ISP
ISN
Q2
150mV
50k
170k
140µA
2.1µA
CTRL
BUFFER
g
m
EAMP
PWM
COMPARATOR
DRIVER
I
SENSE
A4
g
m
A10
A5
OVFB
COMPARATOR
1.25V
FB
SHORT-CIRCUIT
DETECT
OPTION
FOR
LT3755
AND
LT3755-2
OPTION FOR
LT3755-1
SCILMB
SCILMB
5k
PWMOUT PWM
1.25V
V
IN
INTV
CC
VC
+
+
A2
R Q
S
RAMP
GENERATOR
100KHz TO 1MHz
OSCILLATOR
+
+
A8
7.15V
LDO
GATE
SENSE
37551 BD
OPENLED
GND
1.2V
FB
+
1.22V
+
2V
1.3V
RT
SYNCSS
SHDN
A7
10µA
10µA AT
FB = 1.25V
VC
T
LIM
165°C
FAULT
LOGIC
10µA
10µA AT
A1
+
= A1

LT3755IMSE-2#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
LED Lighting Drivers 75V Full-Featured LED Controller
Lifecycle:
New from this manufacturer.
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