Features
80C31 Compatible
8031 pin and instruction compatible
Four 8-bit I/O ports
Two 16-bit timer/counters
128 bytes scratchpad RAM
High-Speed Architecture
40 MHz @ 5V, 30MHz @ 3V
X2 Speed Improvement capability (6 clocks/machine cycle)
30 MHz @ 5V, 20 MHz @ 3V (Equivalent to 60 MHz @ 5V, 40 MHz @ 3V)
Dual Data Pointer
Asynchronous port reset
Interrupt Structure with
5 Interrupt sources,
4 priority level interrupt system
Full duplex Enhanced UART
Framing error detection
Automatic address recognition
Power Control modes
Idle mode
Power-down mode
Power-off Flag
Once mode (On-chip Emulation)
Power supply: 4.5-5.5V, 2.7-5.5V
Temperature ranges: Commercial (0 to 70
o
C) and Industrial (-40 to 85
o
C)
Packages: PDIL40, PLCC44, VQFP44 1.4, PQFP F1 (13.9 footprint)
1. Description
TS80C31X2 is high performance CMOS and ROMless versions of the 80C51 CMOS
single chip 8-bit microcontroller.
The TS80C31X2 retains all features of the TSC80C31 with 128 bytes of internal RAM,
a 5-source, 4 priority level interrupt system, an on-chip oscilator and two
timer/counters.
In addition, the TS80C31X2 has a dual data pointer, a more versatile serial channel
that facilitates multiprocessor communication (EUART) and a X2 speed improvement
mechanism.
The fully static design of the TS80C31X2 allows to reduce system power consumption
by bringing the clock frequency down to any value, even DC, without loss of data.
The TS80C31X2 has 2 software-selectable modes of reduced activity for further
reduction in power consumption. In the idle mode the CPU is frozen while the timers,
the serial port and the interrupt system are still operating. In the power-down mode the
RAM is saved and all other functions are inoperative.
8-bit CMOS
Microcontroller
ROMless
TS80C31X2
AT80C31X2
4428E–8051–02/08
2
4428E–8051–02/08
AT/TS80C31X2
2. Block Diagram
Timer 0
INT
RAM
128x8
T0
T1
RxD
TxD
WR
RD
EA
PSEN
ALE/
XTAL2
XTAL1
EUART
CPU
Timer 1
INT1
Ctrl
INT0
(1)
(1)
C51
CORE
(1) (1) (1) (1)
Port 0
P0
Port 1
Port 2
Port 3
Parallel I/O Ports & Ext. Bus
P1
P2
P3
IB-bus
RESET
PROG
(1)(1)
(1): Alternate function of Port 3
3
4428E–8051–02/08
AT/TS80C31X2
4. SFR Mapping
The Special Function Registers (SFRs) of the TS80C31X2 fall into the following categories:
C51 core registers: ACC, B, DPH, DPL, PSW, SP, AUXR1
I/O port registers: P0, P1, P2, P3
Timer registers: TCON, TH0, TH1, TMOD, TL0, TL1
Serial I/O port registers: SADDR, SADEN, SBUF, SCON
Power and clock control registers: PCON
Interrupt system registers: IE, IP, IPH
Others: CKCON
Table 4-1. All SFRs with their address and their reset value
Bit
addressable Non Bit addressable
0/8 1/9 2/A 3/B 4/C 5/D 6/E 7/F
F8h FFh
F0h
B
0000 0000
F7h
E8h EFh
E0h
ACC
0000 0000
E7h
D8h DFh
D0h
PSW
0000 0000
D7h
C8h CFh
C0h
C7h
B8h
IP
XXX0 0000
SADEN
0000 0000
BFh
B0h
P3
1111 1111
IPH
XXX0 0000
B7h
A8h
IE
0XX0 0000
SADDR
0000 0000
AFh
A0h
P2
1111 1111
AUXR1
XXXX XXX0
A7h
98h
SCON
0000 0000
SBUF
XXXX XXXX
9Fh
90h
P1
1111 1111
97h
88h
TCON
0000 0000
TMOD
0000 0000
TL0
0000 0000
TL1
0000 0000
TH0
0000 0000
TH1
0000 0000
CKCON
XXXX XXX0
8Fh
80h
P0
1111 1111
SP
0000 0111
DPL
0000 0000
DPH
0000 0000
PCON
00X1 0000
87h
0/8 1/9 2/A 3/B 4/C 5/D 6/E 7/F
Reserved

AT80C31X2-RLTUM

Mfr. #:
Manufacturer:
Description:
IC MCU 8BIT ROMLESS 44VQFP
Lifecycle:
New from this manufacturer.
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