AD9243
REV. A
–12–
DRIVING THE ANALOG INPUTS
INTRODUCTION
The AD9243 has a highly flexible input structure allowing it to
interface with single-ended or differential input interface cir-
cuitry. The applications shown in sections “Driving the Analog
Inputs” and “Reference Configurations” along with the infor-
mation presented in “Input and Reference Overview” of this
data sheet, give examples of both single-ended and differential
operation. Refer to Tables I and II for a list of the different
possible input and reference configurations and their associated
figures in the data sheet.
The optimum mode of operation, analog input range, and asso-
ciated interface circuitry will be determined by the particular
applications performance requirements as well as power supply
options. For example, a dc coupled single-ended input may be
appropriate for many data acquisition and imaging applications.
Also, many communication applications which require a dc
coupled input for proper demodulation can take advantage of
the excellent single-ended distortion performance of the AD9243.
The input span should be configured such that the system’s
performance objectives and the headroom requirements of the
driving op amp are simultaneously met.
Alternatively, the differential mode of operation provides the
best THD and SFDR performance over a wide frequency range.
A transformer coupled differential input should be considered
for the most demanding spectral-based applications which allow
ac coupling (e.g., Direct IF to Digital Conversion). The dc-
coupled differential mode of operation also provides an enhance-
ment in distortion and noise performance at higher input spans.
Furthermore, it allows the AD9243 to be configured for a 5 V
span using op amps specified for +5 V or ±5 V operation.
Single-ended operation requires that VINA be ac or dc coupled
to the input signal source while VINB of the AD9243 be biased
to the appropriate voltage corresponding to a midscale code
transition. Note that signal inversion may be easily accom-
plished by transposing VINA and VINB.
Differential operation requires that VINA and VINB be simulta-
neously driven with two equal signals that are in and out of
phase versions of the input signal. Differential operation of the
AD9243 offers the following benefits: (1) Signal swings are
smaller and therefore linearity requirements placed on the input
signal source may be easier to achieve, (2) Signal swings are
smaller and therefore may allow the use of op amps which may
otherwise have been constrained by headroom limitations, (3)
Differential operation minimizes even-order harmonic products,
and (4) Differential operation offers noise immunity based on
the device’s common-mode rejection as shown in Figure 16.
As is typical of most CMOS devices, exceeding the supply limits
will turn on internal parasitic diodes resulting in transient cur-
rents within the device. Figure 28 shows a simple means of
clamping a dc coupled input with the addition of two series
resistors and two diodes. Note that a larger series resistor could
be used to limit the fault current through D1 and D2 but should be
evaluated since it can cause a degradation in overall performance.
AVDD
R
S1
30V
V
CC
V
EE
D2
1N4148
D1
1N4148
R
S2
20V
AD9243
Figure 28. Simple Clamping Circuit
DIFFERENTIAL MODE OF OPERATION
Since not all applications have a signal preconditioned for
differential operation, there is often a need to perform a single-
ended-to-differential conversion. A single-ended-to-differential
conversion can be realized with an RF transformer or a dual op
amp differential driver. The optimum method depends on
whether the application requires the input signal to be ac or dc
coupled to AD9243.
AC Coupling via an RF Transformer
In applications that do not need to be dc coupled, an RF trans-
former with a center tap is the best method to generate differen-
tial inputs for the AD9243. It provides all the benefits of
operating the A/D in the differential mode without contributing
additional noise or distortion. An RF transformer has the added
benefit of providing electrical isolation between the signal source
and the A/D.
Figure 29 shows the schematic of the suggested transformer
circuit. The circuit uses a Mini-Circuits RF transformer, model
#T4-6T, which has an impedance ratio of four (turns ratio of
2). The schematic assumes that the signal source has a 50
source impedance. The 1:4 impedance ratio requires the 200
secondary termination for optimum power transfer and VSWR.
The centertap of the transformer provides a convenient means
of level shifting the input signal to a desired common-mode
voltage. Optimum performance can be realized when the centertap
is tied to CML of the AD9243 which is the common-mode bias
level of the internal SHA.
VINA
CML
VINB
AD9243
0.1mF
200V
MINI-CIRCUITS
T4-6T
50V
Figure 29. Transformer Coupled Input
Transformers with other turns ratios may also be selected to
optimize the performance of a given application. For example, a
given input signal source or amplifier may realize an improve-
ment in distortion performance at reduced output power levels
and signal swings. Hence, selecting a transformer with a higher
impedance ratio (i.e., Mini-Circuits T16-6T with a 1:16 imped-
ance ratio) effectively “steps up” the signal level, further reduc-
ing the driving requirements of the signal source.
AD9243
REV. A
–13–
DC Coupling with Op Amps
Applications that require dc coupling can also benefit by driving
the AD9243 differentially. Since the signal swing requirements
of each input is reduced by a factor of two in the differential
mode, the AD9243 can be configured for a 5 V input span in a
+5 V or ±5 V system. This allows various high performance op
amps specified for +5 V and ±5 V operation to be configured in
various differential driver topologies. The optimum op amp
driver topology depends on whether the common-mode voltage
of the single-ended-input signal requires level-shifting.
Figure 30 shows a cross-coupled differential driver circuit best
suited for systems in which the common-mode signal of the
input is already biased to approximately midsupply (i.e., 2.5 V).
The common-mode voltage of the differential output is set by
the voltage applied to the “+” input of A2. The closed loop
gain of this symmetrical driver can be easily set by R
IN
and R
F
.
For more insight into the operation of this cross-coupled driver,
please refer to the AD8042 data sheet.
VINA
VINB
CML
AD9243
0.1mF
1kV
1kV
1kV
1kV
R
IN
1kV
V
IN
V
CML
–VIN
AV
DD
/2
V
CML
+VIN
AD8042
AD8042
33V
33V
C
F
*
*OPTIONAL NOISE/BAND LIMITING CAPACITOR
R
F
1kV
Figure 30. Cross-Coupled Differential Driver
The driver circuit shown in Figure 31 is best suited for systems
in which the bipolar input signal is referenced to AGND and
requires proper level shifting. This driver circuit provides the
ability to level-shift the input signal to within the common-
mode range of the AD9243. The two op amps are configured as
matched difference amplifiers with the input signal applied to
opposing inputs to provide the differential output. The common-
mode offset voltage is applied to the noninverting resistor net-
work which provides the proper level shifting. The circuit also
employs optional diodes and pull-up resistors which may help
improve the op amps’ distortion performance by reducing their
headroom requirements. Rail-to-rail output amplifiers like the
AD8042 have sufficient headroom and thus do not require
these optional components.
VINA
VINB
CML
AD9243
390V
390V
V
IN
V
CML
–VIN
V
CML
+VIN
AV
DD
390V
390V
390V
390V
AV
DD
390V
390V
390V
AD8047
AD8047
2.5kV
33V
100V
0.1mF 1mF
0.1mF
OP113
33V
390V
Figure 31. Differential Driver with Level-Shifting
SINGLE-ENDED MODE OF OPERATION
The AD9243 can be configured for single-ended operation
using dc or ac coupling. In either case, the input of the A/D
must be driven from an operational amplifier that will not de-
grade the A/D’s performance. Because the A/D operates from a
single supply, it will be necessary to level shift ground-based
bipolar signals to comply with its input requirements. Both dc
and ac coupling provide this necessary function, but each
method results in different interface issues which may influence
the system design and performance.
DC COUPLING AND INTERFACE ISSUES
Many applications require the analog input signal to be dc
coupled to the AD9243. An operational amplifier can be con-
figured to rescale and level shift the input signal so that it is
compatible with the selected input range of the A/D. The input
range to the A/D should be selected on the basis of system
performance objectives as well as the analog power supply
availability since this will place certain constraints on the op
amp selection.
Many of the new high performance op amps are specified for
only ±5 V operation and have limited input/output swing capa-
bilities. Hence, the selected input range of the AD9243 should
be sensitive to the headroom requirements of the particular op
amp to prevent clipping of the signal. Also, since the output of
a dual supply amplifier can swing below –0.3 V, clamping its
output should be considered in some applications.
In some applications, it may be advantageous to use an op amp
specified for single supply +5 V operation since it will inher-
ently limit its output swing to within the power supply rails.
Rail-to-rail output amplifiers such as the AD8041 allow the
AD9243 to be configured with larger input spans which im-
proves the noise performance.
AD9243
REV. A
–14–
If the application requires the largest single-ended input range
(i.e., 0 V to 5 V) of the AD9243, the op amp will require larger
supplies to drive it. Various high speed amplifiers in the Op
Amp Selection Guide” of this data sheet can be selected to
accommodate a wide range of supply options. Once again,
clamping the output of the amplifier should be considered for
these applications. Alternatively, a single-ended to differential
op amp driver circuit using the AD8042 could be used to
achieve the 5 V input span while operating from a single +5 V
supply.
Two dc coupled op amp circuits using a noninverting and inverting
topology are discussed below. Although not shown, the nonin-
verting and inverting topologies can be easily configured as part
of an antialiasing filter by using a Sallen-Key or Multiple-Feed-
back topology, respectively. An additional R-C network can be
inserted between the op amp’s output and the AD9243 input to
provide a real pole.
Simple Op Amp Buffer
In the simplest case, the input signal to the AD9243 will already
be biased at levels in accordance with the selected input range.
It is simply necessary to provide an adequately low source im-
pedance for the VINA and VINB analog input pins of the A/D.
Figure 32 shows the recommended configuration for a single-
ended drive using an op amp. In this case, the op amp is shown
in a noninverting unity gain configuration driving the VINA pin.
The internal reference drives the VINB pin. Note that the
addition of a small series resistor of 30 to 50 connected to
VINA and VINB will be beneficial in nearly all cases. Refer to
section “Analog Input Operation” for a discussion on resistor
selection. Figure 32 shows the proper connection for a 0 V to 5 V
input range. Alternative single ended input ranges of 0 V to 2 ×
VREF can also be realized with the proper configuration of VREF
(refer to the section “Using the Internal Reference”).
10mF
VINA
VINB
SENSE
AD9243
0.1mF
R
S
+V
–V
R
S
VREF
5V
0V U1
2.5V
Figure 32. Single-Ended AD9243 Op Amp Drive Circuit
Op Amp with DC Level Shifting
Figure 33 shows a dc-coupled level shifting circuit employing an
op amp, A1, to sum the input signal with the desired dc offset.
Configuring the op amp in the inverting mode with the given
resistor values results in an ac signal gain of –1. If the signal
inversion is undesirable, interchange the VINA and VINB con-
nections to reestablish the original signal polarity. The dc volt-
age at VREF sets the common-mode voltage of the AD9243. For
example, when VREF = 2.5 V, the output level from the op amp
will also be centered around 2.5 V. The use of ratio matched,
thin-film resistor networks will minimize gain and offset errors.
Also, an optional pull-up resistor, R
P
, may be used to reduce the
output load on VREF to ±1 mA.
0V
DC
+VREF
–VREF
VINA
VINB
AD9243
0.1mF
500V*
0.1mF
500V*
7
1
2
3
4
5
A1
6
NC
NC
+V
CC
500V*
R
S
VREF
500V*
R
S
AVDD
R
P
**
*OPTIONAL RESISTOR NETWORK-OHMTEK ORNA500D
**OPTIONAL PULL-UP RESISTOR WHEN USING INTERNAL REFERENCE
NC = NO CONNECT
Figure 33. Single-Ended Input With DC-Coupled Level Shift
AC COUPLING AND INTERFACE ISSUES
For applications where ac coupling is appropriate, the op amp’s
output can be easily level shifted to the common-mode voltage,
V
CM
, of the AD9243 via a coupling capacitor. This has the
advantage of allowing the op amps common-mode level to be
symmetrically biased to its midsupply level (i.e., (V
CC
+ V
EE
)/2).
Op amps which operate symmetrically with respect to their
power supplies typically provide the best ac performance as well
as greatest input/output span. Hence, various high speed/perfor-
mance amplifiers which are restricted to +5 V/–5 V operation
and/or specified for +5 V single-supply operation can be easily
configured for the 5 V or 2 V input span of the AD9243, respec-
tively. The best ac distortion performance is achieved when the
A/D is configured for a 2 V input span and common-mode
voltage of 2.5 V. Note that differential transformer coupling,
which is another form of ac coupling, should be considered for
optimum ac performance.
Simple AC Interface
Figure 34 shows a typical example of an ac-coupled, single-
ended configuration. The bias voltage shifts the bipolar, ground-
referenced input signal to approximately VREF. The value for
C1 and C2
will depend on the size of the resistor, R. The ca-
pacitors, C1 and C2, are typically a 0.1 µF ceramic and 10 µF
tantalum capacitor in parallel to achieve a low cutoff frequency
while maintaining a low impedance over a wide frequency range.
The combination of the capacitor and the resistor form a high-
pass filter with a high-pass –3 dB frequency determined by the
equation,
f
–3 dB
= 1/(2 × π × R × (C1 + C2))
The low impedance VREF voltage source biases both the VINB
input and provides the bias voltage for the VINA input. Figure
34 shows the VREF configured for 2.5 V. Thus the input range
C2
VINA
VINB
SENSE
AD9243
C1
R
+5V
–5V
R
S
VREF
+VREF
0V
–VREF
V
IN
C2
C1
R
S
Figure 34. AC-Coupled Input

AD9243ASZRL

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Analog Devices Inc.
Description:
Analog to Digital Converters - ADC Complete 14B 3 MSPS Monolithic
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