AD9243
REV. A
–15–
of the A/D is 0 V to 5 V. Other input ranges could be selected
by changing VREF but the A/D’s distortion performance will
degrade slightly as the input common-mode voltage deviates
from its optimum level of 2.5 V.
Alternative AC Interface
Figure 35 shows a flexible ac coupled circuit which can be con-
figured for different input spans. Since the common-mode
voltage of VINA and VINB are biased to midsupply indepen-
dent of VREF, VREF can be pin-strapped or reconfigured to
achieve input spans between 2 V and 5 V p-p. The AD9243’s
CMRR along with the symmetrical coupling R-C networks will
reject both power supply variations and noise. The resistors, R,
establish the common-mode voltage. They may have a high value
(e.g., 5 k) to minimize power consumption and establish a low
cutoff frequency. The capacitors, C1
and C2, are typically a
0.1 µF ceramic and 10 µF tantalum capacitor in parallel to achieve
a low cutoff frequency while maintaining a low impedance over
a wide frequency range. R
S
isolates the buffer amplifier from the
A/D input. The optimum performance is achieved when VINA
and VINB are driven via symmetrical networks. The high pass
f
–3 dB
point can be approximated by the equation,
f
–3 dB
= 1/(2 × π × R/2 × (C1 + C2))
C2
VINA
VINB
AD9243
C1
R
+5V
–5V
R
S
V
IN
C1
C2
R
R
S
+5V
R
R
+5V
Figure 35. AC-Coupled Input-Flexible Input Span,
V
CM
= 2.5 V
OP AMP SELECTION GUIDE
Op amp selection for the AD9243 is highly dependent on a
particular application. In general, the performance requirements
of any given application can be characterized by either time
domain or frequency domain parameters. In either case, one
should carefully select an op amp which preserves the perfor-
mance of the A/D. This task becomes challenging when one
considers the AD9243’s high performance capabilities coupled
with other external system level requirements such as power
consumption and cost.
The ability to select the optimal op amp may be further compli-
cated by either limited power supply availability and/or limited
acceptable supplies for a desired op amp. Newer, high performance
op amps typically have input and output range limitations in
accordance with their lower supply voltages. As a result, some
op amps will be more appropriate in systems where ac-coupling
is allowable. When dc-coupling is required, op amps without
headroom constraints such as rail-to-rail op amps or ones where
larger supplies can be used should be considered. The following
section describes some op amps currently available from Analog
Devices. The system designer is always encouraged to contact
the factory or local sales office to be updated on Analog Devices’
latest amplifier product offerings. Highlights of the areas where
the op amps excel and where they may limit the performance of
the AD9243 are also included.
AD812: Dual, 145 MHz Unity GBW, Single-Supply Cur-
rent Feedback, +5 V to ±15 V Supplies
Best Applications: Differential and/or Low Imped-
ance Input Drivers
Limits: THD above 1 MHz
AD8011: f
–3 dB
= 300 MHz, +5 V or ±5 V Supplies, Current
Feedback
Best Applications: Single-Supply, AC/DC-Coupled,
Good AC Specs, Low Noise, Low Power (5 mW)
Limits: THD above 5 MHz, Usable Input/Output
Range
AD8013: Triple, f
–3 dB
= 230 MHz, +5 V or ±5 V supplies,
Current Feedback, Disable Function
Best Applications: 3:1 Multiplexer, Good AC Specs
Limits: THD above 5 MHz, Input Range
AD9631: 220 MHz Unity GBW, 16 ns Settling to 0.01%,
±5 V Supplies
Best Applications: Best AC Specs, Low Noise,
AC-Coupled
Limits: Usable Input/Output Range, Power
Consumption
AD8047: 130 MHz Unity GBW, 30 ns Settling to 0.01%,
±5 V Supplies
Best Applications: Good AC Specs, Low Noise,
AC-Coupled
Limits: THD > 5 MHz, Usable Input Range
AD8041: Rail-to-Rail, 160 MHz Unity GBW, 55 ns Settling
to 0.01%, +5 V Supply, 26 mW
Best Applications: Low Power, Single-Supply Sys-
tems, DC-Coupled, Large Input Range
Limits: Noise with 2 V Input Range
AD8042: Dual AD8041
Best Applications: Differential and/or Low Imped-
ance Input Drivers
Limits: Noise with 2 V Input Range
REFERENCE CONFIGURATIONS
The figures associated with this section on internal and external
reference operation do not show recommended matching series resistors
for VINA and VINB for the purpose of simplicity. Please refer to
section “Driving the Analog Inputs, Introduction” for a discussion of
this topic. Also, the figures do not show the decoupling network asso-
ciated with the CAPT and CAPB pins. Please refer to the section “Ref-
erence Operation” for a discussion of the internal reference circuitry
and the recommended decoupling network shown in Figure 27.
USING THE INTERNAL REFERENCE
Single-Ended Input with 0 to 2 3 VREF Range
Figure 36 shows how to connect the AD9243 for a 0 V to 2 V or
0 V to 5 V input range via pin strapping the SENSE pin. An
intermediate input range of 0 to 2 × VREF can be established
using the resistor programmable configuration in Figure 38 and
connecting VREF to VINB.
In either case, both the common-mode voltage and input span
are directly dependent on the value of VREF. More specifically,
the common-mode voltage is equal to VREF while the input
span is equal to 2 × VREF. Thus, the valid input range extends
from 0 to 2 × VREF. When VINA is 0 V, the digital output
will be 0000 Hex; when VINA is 2 × VREF, the digital output
will be 3FFF Hex.
AD9243
REV. A
–16–
Shorting the VREF pin directly to the SENSE pin places the
internal reference amplifier in unity-gain mode and the resultant
VREF output is 1 V. Therefore, the valid input range is 0 V to
2 V. However, shorting the SENSE pin directly to the REFCOM
pin configures the internal reference amplifier for a gain of 2.5
and the resultant VREF output is 2.5 V. Thus, the valid input
range becomes 0 V to 5 V. The VREF pin should be bypassed
to the REFCOM pin with a 10 µF tantalum capacitor in parallel
with a low-inductance 0.1 µF ceramic capacitor.
10mF
VINA
VREF
AD9243
0.1mF
VINB
2xVREF
0V
SHORT FOR 0V TO 2V
INPUT SPAN
SENSE
SHORT FOR 0V TO 5V
INPUT SPAN
REFCOM
Figure 36. Internal Reference (2 V p-p Input Span,
V
CM
= 1 V, or 5 V p-p Input Span, V
CM
= 2.5 V)
Single-Ended or Differential Input, V
CM
= 2.5 V
Figure 37 shows the single-ended configuration that gives the
best SINAD performance. To optimize dynamic specifications,
center the common-mode voltage of the analog input at
approximately by 2.5 V by connecting VINB to VREF, a low-
impedance 2.5 V source. As described above, shorting the
SENSE pin directly to the REFCOM pin results in a 2.5 V
reference voltage and a 5 V p-p input span. The valid range
for input signals is 0 V to 5 V. The VREF pin should be by-
passed to the REFCOM pin with a 10 µF tantalum capacitor in
parallel with a low inductance 0.1 µF ceramic capacitor.
This reference configuration could also be used for a differential
input in which VINA and VINB are driven via a transformer as
shown in Figure 29. In this case, the common-mode voltage,
V
CM
, is set at midsupply by connecting the transformers center
tap to CML of the AD9243. VREF can be configured for 1 V
or 2.5 V by connecting SENSE to either VREF or REFCOM
respectively. Note that the valid input range for each of the
differential inputs is one half of the single-ended input and thus
becomes V
CM
– VREF/2 to V
CM
+ VREF/2.
0.1mF
10mF
VINA
VINB
VREF
SENSE
REFCOM
AD9243
5V
0V
2.5V
Figure 37. Internal Reference—5 V p-p Input Span,
V
CM
= 2.5 V
Resistor Programmable Reference
Figure 38 shows an example of how to generate a reference
voltage other than 1 V or 2.5 V with the addition of two exter-
nal resistors and a bypass capacitor. Use the equation,
VREF = 1 V × (1 + R1/R2),
to determine appropriate values for R1 and R2. These resistors
should be in the 2 k to 100 k range. For the example shown,
R1 equals 2.5 k and R2 equals 5 k. From the equation
above, the resultant reference voltage on the VREF pin is
1.5 V. This sets the input span to be 3 V p-p. To assure stabil-
ity, place a 0.1 µF ceramic capacitor in parallel with R1.
The common-mode voltage can be set to VREF by connecting
VINB to VREF to provide an input span of 0 to 2 × VREF.
Alternatively, the common-mode voltage can be set to 2.5 V
by connecting VINB to a low impedance 2.5 V source. For
the example shown, the valid input single range for VINA is
1 V to 4 V since VINB is set to an external, low impedance 2.5
V source. The VREF pin should be bypassed to the REFCOM
pin with a 10 µF tantalum capacitor in parallel with a low induc-
tance 0.1 µF ceramic capacitor.
4V
1V
1.5V
C1
0.1mF
10mF
VINA
VINB
VREF
SENSE
REFCOM
AD9243
2.5V
R1
2.5kV
R2
5kV
0.1mF
Figure 38. Resistor Programmable Reference (3 V p-p
Input Span, V
CM
= 2.5 V)
USING AN EXTERNAL REFERENCE
Using an external reference may enhance the dc performance of
the AD9243 by improving drift and accuracy. Figures 39
through 41 show examples of how to use an external reference
with the A/D. Table III is a list of suitable voltage references
from Analog Devices. To use an external reference, the user
must disable the internal reference amplifier and drive the VREF
pin. Connecting the SENSE pin to AVDD disables the inter-
nal reference amplifier.
Table III. Suitable Voltage References
Initial Operating
Output Drift Accuracy Current
Voltage (ppm/8C) % (max) (mA)
Internal 1.00 26 1.4 N/A
AD589 1.235 10–100 1.2–2.8 50
AD1580 1.225 50–100 0.08–0.8 50
REF191 2.048 5–25 0.1–0.5 45
Internal 2.50 26 1.4 N/A
REF192 2.50 5–25 0.08–0.4 45
REF43 2.50 10–25 0.06–0.1 600
AD780 2.50 3–7 0.04–0.2 1000
AD9243
REV. A
–17–
The AD9243 contains an internal reference buffer, A2 (see
Figure 26), that simplifies the drive requirements of an external
reference. The external reference must be able to drive a 5 k
(±20%) load. Note that the bandwidth of the reference buffer is
deliberately left small to minimize the reference noise contribu-
tion. As a result, it is not possible to change the reference volt-
age rapidly in this mode without the removal of the CAPT/
CAPB Decoupling Network, and driving these pins directly.
Variable Input Span with V
CM
= 2.5 V
Figure 39 shows an example of the AD9243 configured for an
input span of 2 × VREF centered at 2.5 V. An external 2.5 V
reference drives the VINB pin thus setting the common-mode
voltage at 2.5 V. The input span can be independently set by a
voltage divider consisting of R1 and R2 which generates the
VREF signal. A1 buffers this resistor network and drives VREF.
Choose this op amp based on accuracy requirements. It is
essential that a minimum of a 10 µF capacitor in parallel with a
0.1 µF low inductance ceramic capacitor decouple the reference
output to ground.
2.5V+VREF
2.5V–VREF
2.5V
+5V
0.1mF
22mF
VINA
VINB
VREF
SENSE
AD9243
+5V
R2
0.1mF
A1
R1
0.1mF
2.5V
REF
Figure 39. External Reference, V
CM
= 2.5 V (2.5 V on VINB,
Resistor Divider to Make VREF)
Single-Ended Input with 0 to 2 3 VREF Range
Figure 40 shows an example of an external reference driving
both VINB and VREF. In this case, both the common mode
voltage and input span are directly dependent on the value of
VREF. More specifically, the common-mode voltage is equal to
VREF while the input span is equal to 2 × VREF. Thus, the
valid input range extends from 0 to 2 × VREF. For example, if
the REF191, a 2.048 external reference was selected, the valid
input range extends from 0 V to 4.096 V. In this case, 1 LSB of
the AD9243 corresponds to 0.250 mV. It is essential that a
minimum of a 10 µF capacitor in parallel with a 0.1 µF low induc-
tance ceramic capacitor decouple the reference output to ground.
2xREF
0V
+5V
10mF
VINA
VINB
VREF
SENSE
AD9243
+5V
0.1mF
VREF
0.1mF
0.1mF
Figure 40. Input Range = 0 V to 2
×
VREF
Low Cost/Power Reference
The external reference circuit shown in Figure 41 uses a low
cost 1.225 V external reference (e.g., AD580 or AD1580) along
with an op amp and transistor. The 2N2222 transistor acts in
conjunction with 1/2 of an OP282 to provide a very low imped-
ance drive for VINB. The selected op amp need not be a high
speed op amp and may be selected based on cost, power, and
accuracy.
3.75V
1.25V
+5V
10mF
VINA
VINB
VREF
SENSE
AD9243
+5V
0.1mF
316V
1kV
0.1mF
1/2
OP282
10mF
0.1mF
7.5kV
AD1580
1kV
1kV
820V
+5V
2N2222
1.225V
Figure 41. External Reference Using the AD1580 and Low
Impedance Buffer
DIGITAL INPUTS AND OUTPUTS
Digital Outputs
The AD9243 output data is presented in positive true straight
binary for all input ranges. Table IV indicates the output data
formats for various input ranges regardless of the selected input
range. A twos complement output data format can be created by
inverting the MSB.
Table IV. Output Data Format
Input (V) Condition (V) Digital Output OTR
VINA –VINB < – VREF 00 0000 0000 0000 1
VINA –VINB = – VREF 00 0000 0000 0000 0
VINA –VINB = 0 10 0000 0000 0000 0
VINA –VINB = + VREF – 1 LSB 11 1111 1111 1111 0
VINA –VINB + VREF 11 1111 1111 1111 1
111111 1111 1111
111111 1111 1111
111111 1111 1110
OTR
–FS
+FS
–FS +1/2 LSB
+FS –1/2 LSB–FS –1/2 LSB
+FS –1 1/2 LSB
000000 0000 0001
000000 0000 0000
000000 0000 0000
1
0
0
0
0
1
OTR DATA OUTPUTS
Figure 42. Output Data Format
Out Of Range (OTR)
An out-of-range condition exists when the analog input voltage
is beyond the input range of the converter. OTR is a digital
output that is updated along with the data output corresponding
to the particular sampled analog input voltage. Hence, OTR
has the same pipeline delay (latency) as the digital data. It is
LOW when the analog input voltage is within the analog input
range. It is HIGH when the analog input voltage exceeds the
input range as shown in Figure 42. OTR will remain HIGH

AD9243ASZRL

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Analog to Digital Converters - ADC Complete 14B 3 MSPS Monolithic
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