ADV7842
Rev. B | Page 21 of 28
STANDARD DEFINITION PROCESSOR
The SDP is capable of decoding a large selection of baseband
video signals in composite and S-Video formats. The video
standards supported by the SDP include PAL, PAL 60, PAL M,
PAL N, PAL NC, NTSC M/J, NTSC 4.43, and SECAM. The
ADV7842 can automatically detect the video standard and
process it accordingly.
The SDP has a 3D temporal comb filter and a five-line adaptive
2D comb filter that gives superior chrominance and luminance
separation when decoding a composite video signal. This highly
adaptive filter automatically adjusts its processing mode according
to the video standard and signal quality with no user intervention
required. The SDP has an IF filter block that compensates for
attenuation in the high frequency chroma spectrum due to a tuner
SAW filter. The SDP has specific luminance and chrominance
parameter controls for brightness, contrast, saturation, and hue.
The ADV7842 implements a patented Adaptive Digital Line
Length Tracking (ADLLT™) algorithm to track varying video
line lengths from sources such as a VCR. ADLLT enables the
ADV7842 to track and decode poor quality video sources (such
as VCRs) and noisy sources (such as tuner outputs, VCR
players, and camcorders). Frame TBC ensures stable clock
synchronization between the decoder and the downstream
devices.
The SDP also contains both a luma transient improvement (LTI)
block and a chroma transient improvement (CTI) block. These
increase the edge rate on the luma and chroma transitions,
resulting in a sharper video image. The SDP has a Macrovision®
detection circuit that allows Type I, Type II, and Type III
Macrovision protection levels. The decoder is also fully robust
to all Macrovision signal inputs.
SDP features include:
Advanced adaptive 3D comb (using either external DDR or
SDR SDRAM memory)
Adaptive 2D five-line comb filters for NTSC and PAL that
give superior chrominance and luminance separation for
composite video
Full automatic detection and autoswitching of all
worldwide standards (PAL, NTSC, and SECAM)
Automatic gain control with white peak mode that ensures
the video is always processed without loss of the video
processing range
Proprietary architecture for locking to weak, noisy, and
unstable sources from VCRs and tuners
IF filter block that compensates for high frequency luma
attenuation due to tuner SAW filter
LTI and CTI
Vertical and horizontal programmable luma peaking filters
8× oversampling (108 MHz) for CVBS, and S-Video modes
Line-locked clock (LLC) output
Free run output mode that provides stable timing when no
video input is present or video lock is lost
Internal color bar test pattern
Advanced TBC with frame synchronization, which ensures
nominal clock and data for nonstandard input
Interlace-to-progressive conversion for 525i and 625i
formats, enabling direct drive of HDMI Tx devices
Color controls that include hue, brightness, saturation, and
contrast
COMPONENT PROCESSOR
The CP section of the ADV7842 is capable of decoding and
digitizing a wide range of component video formats in any color
space. Component video standards supported by the CP are
525i, 625i, 525p, 625p, 720p, 1080i, 1080p, 1250i, VGA up to
UXGA at 60 Hz, and other standards.
The any-to-any, 3 × 3 CSC matrix is placed between the analog
front end and the CP section. This enables YPbPr to RGB and
RGB to YCbCr conversions. Many other standards of color
space can be implemented using the color space converter.
The CP section contains circuitry to enable the detection of
Macrovision encoded YPbPr signals for 525i, 625i, 525p, and
625p. It is designed to be fully robust when decoding these
types of signals. VBI extraction of CGMS data is performed by the
CP section of the ADV7842 for interlaced, progressive, and high
definition scanning rates. The data extracted can be read back over
the I
2
C interface.
CP features include:
525i, 625i, 525p, 625p, 720p, 1080i, 1080p, and many other
HDTV formats are supported
Supports 720p 24 Hz/25 Hz formats
Manual adjustments, including gain (contrast),
offset (brightness), hue, and saturation
Support for analog component YPbPr and RGB video
formats with embedded synchronization, composite
synchronization or separate HS and VS
Any-to-any, 3 × 3 CSC matrix that supports YCbCr-to-
RGB and RGB-to-YCbCr, fully programmable or
preprogrammable configurations
Synchronization source polarity detector (SSPD) that
determines the source and polarity of the synchronization
signals that accompany the input video
Macrovision copy protection detection on component
formats (525i, 625i, 525p, and 625p)
Free-run output mode that provides stable timing when no
video input is present or video lock is lost
Arbitrary pixel sampling support for nonstandard video
sources
170 MHz conversion rate, which supports RGB input
resolutions up to 1600 × 1200 at 60 Hz
Standard identification enabled by STDI block
RGB that can be color space converted to YCbCr and
decimated to a 4:2:2 format for video-centric back-end IC
interfacing
ADV7842
Rev. B | Page 22 of 28
Data enable (DE) output signal supplied for direct
connection to HDMI/DVI Tx IC
32-phase DLL that allows optimum pixel clock sampling
Automatic detection of synchronization source and
polarity by SSPD block
Contrast, brightness, hue, and saturation controls
Automatic or manual clamp-and-gain controls for graphics
modes
OTHER FEATURES
The ADV7842 has HS, VS, FIELD, and DE output signals with
programmable position, polarity, and width, and two I
2
C host
port interfaces (control and VBI). The ADV7842 has two
programmable interrupt request output pins, INT1 and INT2.
It also features a number of low power modes and a full power-
down mode. The ADV7842 is provided in a 17 mm × 17 mm,
RoHS-compliant BGA package, and is specified over the
−10°C to +70°C temperature range.
For more detailed product information about the ADV7842,
contact your local Analog Devices sales office.
ADV7842
Rev. B | Page 23 of 28
EXTERNAL MEMORY REQUIREMENTS
The ADV7842 uses external SDRAM for 3D comb and frame
synchronizer. The ADV7842 supports either SDR or DDR
SD RAM.
SINGLE DATA RATE (SDR)
The ADV7842 can use SDR external memory to provide 3D comb
or frame synchronizer operation nonconcurrently.
There is a 64 Mb SDR SDRAM minimum memory require-
ment. The required memory architecture is four banks of
1 Mb × 16 (4M16) with a speed grade of 133 MHz at CAS
latency (CL) 3. Using 22 Ω series termination resistors is recom-
mended for this configuration.
Recommended SDR memory that is compatible with the
ADV7842 includes Winbond W9864G6PH-7.
DOUBLE DATA RATE (DDR)
The ADV7842 can use DDR external memory to
simultaneously provide 3D comb and frame synchronizer
operation.
There is a 128 Mb DDR SDRAM minimum memory requirement.
The required memory architecture is four banks of 2 Mb × 16
(8M16) with a speed grade of 133 MHz at CL 2.5. Using 22 series
termination resistors is recommended for this configuration
Recommended DDR memory that is compatible with the
ADV7842 includes the K4H561638J-LCB3 from Samsung, the
MT46V16M16P-6T from Micron Technology, Inc. and the
H5DU1262GTR-E3C from Hynix Inc.

EVAL-ADV7842-7511P

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Video IC Development Tools Require HDMI license see product comment
Lifecycle:
New from this manufacturer.
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