ADV7842
Rev. B | Page 25 of 28
REGISTER MAP ARCHITECTURE
The registers of the ADV7842 are controlled via a 2-wire
serial (I
2
C-compatible) interface. The ADV7842 has
12 maps. The IO map has a static I
2
C address. All other
map addresses must be programmed; this ensures no
addressing clashes on the system. Figure 9 shows the register
map architecture.
Table 8.
Register Map Name Default Address Programmable Address Location at Which Address Can Be Programmed
IO Map 0x40 Not programmable Not applicable
CP Map 0x00 Programmable IO map, Register 0xFD
SDP Map 0x00 Programmable IO map, Register 0xF1
SDP_IO Map 0x00 Programmable IO map, Register 0xF2
VDP Map 0x00 Programmable IO map, Register 0xFE
AVLINK Map 0x00 Programmable IO map, Register 0xF3
CEC Map 0x00 Programmable IO map, Register 0xF4
HDMI Map 0x00 Programmable IO map, Register 0xFB
EDID Map 0x00 Programmable IO map, Register 0xFA
Repeater Map 0x00 Programmable IO map, Register 0xF9
AFE, DPLL Map 0x00 Programmable IO map, Register 0xF8
InfoFrame Map 0x00 Programmable IO map, Register 0xF5
CEC
MAP
SLAVE
ADDRESS:
PROGRAMMABLE
AVLINK
MAP
SLAVE
ADDRESS:
PROGRAMMABLE
VDP
MAP
SLAVE
ADDRESS:
PROGRAMMABLE
SDP_IO
MAP
SLAVE
ADDRESS:
PROGRAMMABLE
SDP
MAP
SLAVE
ADDRESS:
PROGRAMMABLE
CP
MAP
SLAVE
ADDRESS:
PROGRAMMABLE
IO
MAP
SLAVE
ADDRESS:
0x40
INFOFRAME
MAP
SLAVE
ADDRESS:
PROGRAMMABLE
AFE, DPLL
MAP
SLAVE
ADDRESS:
PROGRAMMABLE
REPEATER
MAP
SLAVE
ADDRESS:
PROGRAMMABLE
EDID
MAP
SLAVE
ADDRESS:
PROGRAMMABLE
HDMI
MAP
SLAVE
ADDRESS:
PROGRAMMABLE
SCL
SDA
08849-008
Figure 9. Register Map Architecture
