LTC6403-1
10
64031fa
APPLICATIONS INFORMATION
+
1
SHDN
5 6
–IN
7
+OUT
8
+OUTF
16 15
+IN
NC
NC
14
–OUT
13
–OUTF
V
–OUTF
R
F
V+
OUTF
2
V
+
3
V
V
+
V
+
V
V
+
V
4
V
OCM
V
SHDN
V
OCM
V
OCM
12
V
11
V
+
10
V
+
9
V
V
V
V
V
64031 F01
LTC6403-1
SHDN
0.1μF
0.01μF
V
CM
R
F
I
L
R
I
R
I
R
BAL
R
BAL
+
V
INP
+
V
INM
I
L
V
–IN
V
+IN
V
+OUT
V
–OUT
V
OUTCM
V
+
0.1μF
0.1μF
0.1μF
0.1μF
0.1μF
Figure 1. DC Test Circuit
APPLICATIONS INFORMATION
Figure 2. AC Test Circuit (–3dB BW Testing)
V
V
V
+
0.1μF
0.1μF
0.1μF
0.1μF
0.1μF
+
1
SHDN
5 6
–IN
7
+OUT
8
+OUTF
16 15
+IN
NC
NC
14
–OUT
13
–OUTF
V
–OUTF
R
F
V
+OUTF
2
V
+
3
V
V
+
V
+
V
V
+
V
4
V
OCM
V
SHDN
V
OCM
V
INP
V
INM
V
OCM
12
V
11
V
+
10
V
+
9
V
V
V
64031 F02
LTC6403-1
SHDN
0.1μF
0.01μF
0.1μF
0.1μF
0.1μF
0.1μF
R
F
R
I
R
T
R
I
340Ω
340Ω
50Ω
M/A-COM
ETC1-1-13
MINI-CIRCUITS
TCM4-19
V
–IN
V
+IN
V
+OUT
V
–OUT
+
V
IN
50Ω
R
T
140Ω
140Ω
LTC6403-1
11
64031fa
APPLICATIONS INFORMATION
Functional Description
The LTC6403-1 is a small outline, wide band, low noise,
and low distortion fully-differential amplifi er with accurate
output phase balancing. The LTC6403-1 is optimized to
drive low voltage, single-supply, differential input analog-
to-digital converters (ADCs). The LTC6403-1’s output is
capable of swinging rail-to-rail on supplies as low as 2.7V,
which makes the amplifi er ideal for converting ground
referenced, single-ended signals into V
OCM
referenced
differential signals in preparation for driving low voltage,
single-supply, differential input ADCs. Unlike traditional
op amps which have a single output, the LTC6403-1 has
two outputs to process signals differentially. This allows
for two times the signal swing in low voltage systems
when compared to single-ended output amplifi ers. The
balanced differential nature of the amplifi er also provides
even-order harmonic distortion cancellation, and less
susceptibility to common mode noise (like power supply
noise). The LTC6403-1 can be used as a single ended input
to differential output amplifi er, or as a differential input to
differential output amplifi er.
The LTC6403-1’s output common mode voltage, defi ned
as the average of the two output voltages, is independent
of the input common mode voltage, and is adjusted by
applying a voltage on the V
OCM
pin. If the pin is left open,
an internal resistive voltage divider develops a potential
halfway between the V
+
and V
pin voltages. Whenever
V
OCM
is not hard tied to a low impedance ground plane, it
is recommended that a high quality ceramic capacitor is
used to bypass the V
OCM
pin to a low impedance ground
plane (See Layout Considerations in this document). The
LTC6403-1’s internal common mode feedback path forces
accurate output phase balancing to reduce even order
harmonics, and centers each individual output about the
potential set by the V
OCM
pin.
VV
VV
OUTCM OCM
OUT OUT
==
+
+
2
The outputs (+OUT and –OUT) of the LTC6403-1 are ca-
pable of swinging rail-to-rail. They can source or sink up
to approximately 60mA of current.
Additional outputs (+OUTF and –OUTF) are available that
provide fi ltered versions of the +OUT and –OUT outputs. An
on-chip single pole RC passive fi lter bandlimits the fi ltered
outputs to a –3dB frequency of 44.2MHz. The user has a
choice of using the unfi ltered outputs, the fi ltered outputs,
or modifying the fi ltered outputs to adjust the frequency
response by adding additional components (see Output
Filter Considerations and Use section).
In applications where the full bandwidth of the LTC6403-1
is desired, the unfi ltered outputs (+OUT and –OUT) should
be used. The unfi ltered outputs +OUT and –OUT are
designed to drive 10pF to ground (or 5pF differentially).
Capacitances greater than 10pF will produce excess
peaking, which can be mitigated by placing at least 25Ω
in series with the output.
Input Pin Protection
The LTC6403-1’s input stage is protected against differen-
tial input voltages that exceed 1.4V by two pairs of back
to back diodes connected in anti-parallel series between
+IN and –IN (Pins 6 and 15). In addition, the input pins
have steering diodes to either power supply. If the input
pair is over-driven, the current should be limited to under
10mA to prevent damage to the IC. The LTC6403-1 also
has steering diodes to either power supply on the V
OCM
,
and SHDN pins (Pins 4 and 1), and if exposed to voltages
which exceed either supply, they too, should be current
limited to under 10mA.
SHDN Pin
If the SHDN pin (Pin 1), is pulled 2.1V below the positive
supply, the LTC6403-1 will power down. The pin has the
Thevenin equivalent impedance of approximately 66k to V
+
.
If the pin is left unconnected, an internal pull-up resistor
of 150k will keep the part in normal active operation. Care
should be taken to control leakage currents at this pin to
under 1μA to prevent inadvertently putting the LTC6403-1
into shutdown. In shutdown, all biasing current sources
are shut off, and the output pins, +OUT and –OUT, will each
appear as an open collector with a non-linear capacitor in
parallel and steering diodes to either supply. Because of
LTC6403-1
12
64031fa
APPLICATIONS INFORMATION
the non-linear capacitance, the outputs still have the ability
to sink and source small amounts of transient current if
exposed to signifi cant voltage transients. The inputs (+IN
and –IN) appear as anti-parallel diodes which can conduct
if voltage transients at the input exceed 1.4V. The inputs
also have steering diodes to either supply. The turn-on
time between the shutdown and active states is typically
4μs, and turn-off time is typically 350ns.
General Amplifi er Applications
As levels of integration have increased and correspond-
ingly, system supply voltages decreased, there has been
a need for ADCs to process signals differentially in order
to maintain good signal to noise ratios. These ADCs are
typically operated from a single supply voltage which can
be as low as 3V (2.7V min), and will have an optimal com-
mon mode input range near mid-supply. The LTC6403-1
makes interfacing to these ADCs trivial, by providing both
single ended to differential conversion as well as common
mode level shifting. The front page of this datasheet shows
a typical application. Referring to Figure 1, the gain to
V
OUTDIFF
from V
INM
and V
INP
is:
VVV
R
R
VV
OUTDIFF OUT OUT
F
I
INP INM
=≈
()
+
–•
Note from the above equation, the differential output
voltage (V
+OUT
– V
–OUT
) is completely independent of
input and output common mode voltages. This makes
the LTC6403-1 ideally suited for pre-amplifi cation, level
shifting and conversion of single-ended input signals to
differential output signals in preparation for driving dif-
ferential input ADCs.
Effects of Resistor Pair Mismatch
Figure 3 shows a circuit diagram with takes into consid-
eration that real world resistors will not perfectly match.
Assuming infi nite open loop gain, the differential output
relationship is given by the equation:
VVV
R
R
V
V
OUTDIFF OUT OUT
F
I
INDIFF
AVG
I
=≈+
Δ
+
–•
β
β
NNCM
AVG
OCM
V–•
Δβ
β
where:
R
F
is the average of R
F1
, and R
F2
, and R
I
is the average
of R
I1
, and R
I2
.
β
AVG
is defi ned as the average feedback factor (or gain)
from the outputs to their respective inputs:
β
AVG
I
IF
I
IF
R
RR
R
RR
=
+
+
+
1
2
1
11
2
22
Δβ is defi ned as the difference in feedback factors:
Δ=
++
β
R
RR
R
RR
I
IF
I
IF
2
22
1
11
V
INCM
is defi ned as the average of the two input voltages
V
INP
, and V
INM
(also called the source-referred input com-
mon mode voltage):
VVV
INCM INP INM
=+
()
1
2
and V
INDIFF
is defi ned as the difference of the input
voltages:
V
INDIFF
= V
INP
– V
INM
Figure 3. Real World Application With Feedback Resistor
Pair Mismatch
V
V
V
+
0.1μF
0.1μF
0.1μF
0.1μF
0.1μF
+
1
SHDN
5 6
–IN
7
+OUT
8
+OUTF
16 15
+IN
NC
NC
14
–OUT
13
–OUTF
V
–OUTF
R
F2
V
+OUTF
V
–OUT
V
+OUT
2
V
+
3
V
V
+
V
+
V
V
+
V
4
V
OCM
V
SHDN
V
VOCM
V
OCM
12
V
11
V
+
10
V
+
9
V
V
V
64031 F03
LTC6403-1
SHDN
0.1μF
0.01μF
R
F1
R
I2
R
I1
+
V
INP
+
V
INM
V
–IN
V
+IN

LTC6403HUD-1#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Differential Amplifiers 200MHz Low Noise ADC Driver
Lifecycle:
New from this manufacturer.
Delivery:
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