9FGP202AKLFT Datasheet 9FGP202AKLFT, 9FGP202AKLF | P7-P9

9FGP202A

FREQUENCY TIMING GENERATOR FOR PERIPHERALS

IDT®

FREQUENCY TIMING GENERATOR FOR PERIPHERALS 7

9FGP202A REV D 070511

Absolute Maximum Ratings

Stresses above the ratings listed below can cause permanent damage to the 9FGP202A. These ratings, which are standard

values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other

conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute

maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over

the recommended operating temperature range.

Electrical Characteristics–DOT96SS 0.7V Current Mode Differential Pair

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Notes

3.3V Supply Voltage VDDxxx

GND - 0.5

3.3V

GND + 4.5 V

Maximum difference across all

VDD

ins

VDDdelta

0.5 V

Storage Temperature Ts

-65 150

Ambient Operating Temp Tambient

070°C

Junction Temperature Tj

125 °C

Input ESD protection HBM ESD prot

2000 V

Guaranteed by design and characterization, not 100% tested in production.

PARAMETER SYMB OL CONDITIONS* MIN TYP MAX UNITS Notes

Current Source Output Impedance Zo V

= V

3000

Ω

Voltage High VHigh 660 850 mV 1,3

Voltage Low VLow -150 150 mV 1,3

Max Voltage Vovs 1150 mV 1

Min Voltage Vuds -300 mV 1

Crossing Voltage (abs) Vx(abs) 250 550 mV 1

Crossing Voltage (var) d-Vcross

Variation of crossing over a ll

140 mV 1

Long Accuracy ppm see Tperiod min-max values -100 100 ppm 1,2

96.00MHz nominal 10.4135 10.4198 ns 2

96.00MHz spread 10.4135 10.4722 ns 2

Absolute min period Tabsmin 96.00MHz nominal/spread 10.1635 10.7222 ns 1,2

Rise Time

= 0.175V, V

= 0.525V

175 700 ps 1

Fall Time t

= 0.525V V

= 0.175V 175 700 ps 1

Rise Time Variation d-t

= 0.175V, V

= 0.525V 125 ps 1

Fall Time Variati on d-t

= 0.525V V

= 0.175V 125 ps 1

Duty Cycle

Measure ment from differential

wav ef rom

45 55 % 1

Jitter, C yc le t o cycle

jcyc -cyc

Measure ment from differential

wav ef rom

250 ps 1

= 0 - 70°C; V

= 3.3 V +/-5% ; C

=2pF, R

=33.2

ohms

, R

=49.9

ohms

, I

REF

= 475

ohms

Guaranteed b

desi

n and characterization, not 100% tested in

roduction.

All Lon

Term Accurac

and Clock Period s

ecifications are

uaranteed assumin

that REFOUT is at 25.00MHz

REF

= V

/(3xR

). For R

= 475ohms (1%), I

REF

= 2.32mA. I

= 6 x I

REF

and V

= 0.7V @ Z

=50ohms.

Measurement on single ended

signal using absolute value.

Statistical measu rement on single

ended signal

Average period Tperiod

9FGP202A

FREQUENCY TIMING GENERATOR FOR PERIPHERALS

IDT®

FREQUENCY TIMING GENERATOR FOR PERIPHERALS 8

9FGP202A REV D 070511

Electrical Characteristics–Input/Supply/Common Output Parameters

PARAMETE R SYMB OL CONDITIONS* MIN TYP MAX UNITS Notes

Input High Voltage V

3.3 V +/-5% 2 V

+ 0.3 V 1

Input Low Voltage

3.3 V +/-5%

- 0.3

0.8 V 1

Input High Current

= V

-5 5 uA 1

IL 1

= 0 V; Inputs with no pull-up

resistors

-5 uA 1

IL 2

= 0 V ; Inputs with pull-up

resistors

-200 uA 1

Low Thresh old Input-

h Volta

IH_FS

3.3 V +/-5% 0.7 V

+ 0.3 V 1

Low Thresh old Input-

Low Volta

IL _F S

3.3 V +/-5% V

- 0.3 0.35 V 1

Operating Current I

DD 3.3OP

all outputs driven 200 mA 1

all diff pairs driven 30 mA 1

all differential pairs tri-stated 8 mA 1

Input Frequency

= 3.3 V

25.00000 MHz 2

Pin Inductance

pi n

7nH1

Logic Inputs 4 pF 1

OU T

Output pin capacitance 5 pF 1

INX

X1 & X 2 pins 5 pF 1

Clk Stabiliza tion T

STAB

From V DD Power-Up or de-

assertion of PD to 1st clock

2.5 ms 1

Modulation Frequency Triangular Modulation 30 33 kHz 1

Tdrive_PD

CPU output enable after

PD de-assertion

300 us 1

Tfall_ PD PD fall tim e of 5 ns 1

Trise_PD PD rise time of 5 ns 1

SMBus Voltage V

2.7 5.5 V 1

Low-level Output Voltage

@ I

PUL LUP

0.4 V 1

Current sinking at

= 0.4 V

PULLUP

4mA1

SCLK/SDATA

Clock/Data Rise Time

RI2C

(Max VIL - 0.15) to

(

Min VIH + 0.15

)

1000 ns 1

SCLK/SDATA

Clock/Data Fall Time

FI2C

(Min V IH + 0.15) to

(Max VIL - 0.15)

300 ns 1

*TA = 0 - 70°C; S upply Voltage VDD = 3.3 V +/-5%

Guaranteed b

desi

n and characterization, not 100% tested in

roduction.

Input frequency should be measured at the REF pin and tuned to ideal 25.00MHz to meet ppm frequency accuracy on PLL outputs.

Input Low Current

Powerdow n Current I

DD 3.3PD

Input Capacitance

9FGP202A

FREQUENCY TIMING GENERATOR FOR PERIPHERALS

IDT®

FREQUENCY TIMING GENERATOR FOR PERIPHERALS 9

9FGP202A REV D 070511

Electrical Characteristics–CPU 0.7V Current Mode Differential Pair

PARAMETE R SYMB OL CONDITIONS* MIN TYP MAX UNITS NOTES

Current Source Output Impedance Zo V

= V

3000

Ω

Voltage High VHigh 660 850 mV 1,3

Voltage Low VLow -150 150 mV 1,3

Max Voltage Vovs 1150 mV 1

Min Voltage Vuds -300 mV 1

Crossing Voltage (abs) Vx(abs) 250 550 mV 1

Crossing Voltage (var) d-Vx

Variation of crossing over a ll

140 mV 1

Long Accuracy ppm see Tperiod min-max values -100 0 100 ppm 1,2

400MHz nomin al 2.4998 2.5000 2.5003 ns 2

400MHz sp read 2.4998 2.5128 ns 2

333.33MHz nominal 2.9997 3.0000 3.0003 ns 2

333.33MHz spread 2.9997 3.0154 ns 2

266.66MHz nominal 3.7496 3.7500 3.7504 ns 2

266.66MHz spread 3.7496 3.7692 ns 2

200MHz nomin al 4.9995 5.0000 5.0005 ns 2

200MHz sp read 4.9995 5.0256 ns 2

166.66MHz nominal 5.9994 6.0000 6.0006 ns 2

166.66MHz spread 5.9994 6.0307 ns 2

133.33MHz nominal 7.4993 7.5000 7.5008 ns 2

133.33MHz spread 7.4993 7.5385 ns 2

100.00MHz nominal 9.9990 10.0000 10.0010 ns 2

100.00MHz spread 9.9990 10.0513 ns 2

400MHz nominal/spread 2.4148 2.5978 ns 1,2

333.33MHz nominal/spread 2.9147 3.1004 ns 1,2

266.66MHz nominal/spread 3.6646 3.8542 ns 1,2

200MHz nominal/spread 4.9145 5.1106 ns 1,2

166.66MHz nominal/spread 5.9144 6.1157 ns 1,2

133.33MHz nominal/spread 7.4143 7.6235 ns 1,2

100.00MHz nominal/spread 9.9140 10.1363 ns 1,2

Rise Time t

= 0.175V, V

= 0.525V 175 700 ps 1

Fall Time

= 0.525V V

= 0.175V

175 700 ps 1

Rise Time Variation

d-t

= 0.175V, V

= 0.525V

125 ps 1

Fall T ime Variati on d-t

= 0.525V V

= 0.175V 125 ps 1

Dut y Cycle d

Measure ment from differential

wav ef rom

45 55 % 1

Jitter, C yc le t o cycle t

jcyc -cyc

Measure ment from differential

wavefrom

CPUCLK

85 ps 1

= 0 - 70°C; V

= 3.3 V +/-5%; C

=2pF, R

=33.2ohms, R

=49.9ohms, I

REF

= 475ohms

Guaranteed by design and characterization, not 100% tested in production.

All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REFOUT is at 25.000MHz

REF

= V

/(3xR

). For R

= 475ohms (1%), I

REF

= 2.32mA. I

= 6 x I

REF

and V

= 0.7V @ Z

=50ohms.

Statistical measu rement on single

ended signal

Measurement on single ended

signal using absolute value.

Average period Tperiod

Absolute min/max period T

ab smin /ma x

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P19

9FGP202AKLFT

Mfr. #:

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Manufacturer:

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Description:

Clock Generators & Support Products CK-MNG SERVER PERIPH ERAL CLOCK

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9FGP202AKLFT

9FGP202AKLFT

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