NCV70514
www.onsemi.com
5
Table 3. ABSOLUTE MAXIMUM RATINGS
Characteristic Symbol Min Max Unit
Supply voltage (Note 6) V
BB
−0.3 +40 V
Digital input/outputs voltage V
IO
−0.3 +6.0 V
Junction temperature range (Note 7)
T
j
−45 +175 °C
Storage Temperature (Note 8) T
strg
−55 +160 °C
HBM Electrostatic discharge voltage (Note 9) V
esd_hbm
−2 +2 kV
System Electrostatic discharge voltage (Note 10) V
syst_esd
−8 +8 kV
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
6. V
BB
Max is +43 V for limited time <0.5 s.
7. The circuit functionality is not guaranteed.
8. For limited time up to 100 hours. Otherwise the max storage temperature is 85°C.
9. HBM according to AEC−Q100: EIA−JESD22−A114−B (100 pF via 1.5 kW).
10.System ESD, 150 pF, 330 W, contact discharge on the connector pin, unpowered.
Operating ranges define the limits for functional
operation and parametric characteristics of the device. A
mission profile (Note 11) is a substantial part of the
operation conditions; hence the Customer must contact
ON Semiconductor in order to mutually agree in writing on
the allowed missions profile(s) in the application.
Table 4. RECOMMENDED OPERATING RANGES
Characteristic Symbol Min Typ Max Unit
Battery Supply voltage V
BB
+6 +29 V
Digital input/outputs voltage V
IO
0 +5.5 V
Parametric operating junction temperature range (Notes 12, 14) T
jp
−40 +145 °C
Functional operating junction temperature range (Notes 13, 14) T
jf
−40 +160 °C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
11. A mission profile describes the application specific conditions such as, but not limited to, the cumulative operating conditions over life time,
the system power dissipation, the system’s environmental conditions, the thermal design of the customer’s system, the modes, in which the
device is operated by the customer, etc. No more than 100 cumulated hours in life time above T
tw
.
12.The parametric characteristics of the circuit are not guaranteed outside the Parametric operating junction temperature range.
13.The maximum functional operating temperature range can be limited by thermal shutdown T
tsd
.
14.The cold boost motor current shall be enabled only for ambient temperature below 25°C.
PACKAGE THERMAL CHARACTERISTIC
The NCV70514 is available in thermally optimized
QFN32 5x5 package. For the optimizations, the package has
an exposed thermal pad which has to be soldered to the PCB
ground plane. The ground plane needs thermal vias to
conduct the heat to the bottom layer.
For precise thermal cooling calculations the major
thermal resistances of the devices are given. The thermal
media to which the power of the devices has to be given are:
• Static environmental air (via the case)
• PCB board copper area (via the device pins and
exposed pad)
The major thermal resistances of the device are the Rth
from the junction to the ambient (Rthja) and the Rth from the
junction to the exposed pad (Rthjp).
Using an exposed die pad on the bottom surface of the
package is mainly contributing to this performance. In order
to take full advantage of the exposed pad, it is most
important that the PCB has features to conduct heat away
from the package. In the table below, one can find the values
for the Rthja and Rthjp:
Table 5. THERMAL RESISTANCE
Package Rth, Junction−to−Exposed Pad, Rthjp Rth, Junction−to−Ambient, Rthja (Note 15)
QFN32 5x5 15 K/W 39 K/W
15.The Rthja for 2S2P simulated for worst case power and following conditions:
• A 4−layer printed circuit board with inner power planes and outer (top and bottom) signal layers is used
• Board thickness is 1.46 mm (FR4 PCB material)
• All four layers: 30 um thick copper with an area of 2500 mm
2
where:
− Top layer with 70% copper coverage in 20x20 mm around device, rest 40% copper coverage
− In layer 1 with 70% copper coverage
− In layer 2 with 98% copper coverage
− Bottom layer with 90% copper coverage
• The 12 vias in Exposed Pad area, via diameter 0.4 mm
• Gap−filler max 400 mm between PCB and heat sink non conductive with worst case thermal conductivity of 1.5 W/mK
