The MAX5927A/MAX5929A–MAX5929D turn off all
channels if any of the above conditions are not met.
After a fault-latched shutdown, cycle any of the ON_
inputs to unlatch and restart all channels, depending
on the corresponding V
ON_
state.
Independent Mode
Connect MODE to GND to enter independent mode.
While in independent mode, the MAX5927A/
MAX5929A–MAX5929D provide complete independent
control for each channel. To turn on a given channel:
At least one V
IN_
must exceed V
UVLO
(2.45V) for the
UVLO to startup delay (37.5ms).
The corresponding V
IN_
must exceed V
PWRRDY
(0.95V).
The corresponding V
ON_
must exceed V
ON,TH
(0.875V).
The MAX5927A/MAX5929A–MAX5929D turn off the cor-
responding channel if any of the above conditions are
not met. During a fault condition on a given channel only,
the affected channel is disabled. After a fault-latched
shutdown, recycle the corresponding ON_ inputs to
unlatch and restart only the corresponding channel.
Startup Period
R
TIM
sets the duration of the startup period from 0.4ms
(R
TIM
= 4kΩ) to 50ms (R
TIM
= 500kΩ) (see the
Setting
the Startup Period, R
TIM
section). The default startup
period is fixed at 9ms when TIM is floating. The startup
period begins after the turn-on conditions are met as
described in the
Mode
section, and the device is not
latched or in its autoretry delay (see the
Latched and
Autoretry Fault Management
section).
The MAX5927A/MAX5929A–MAX5929D limit the load
current if an overcurrent fault occurs during startup
instead of completely turning off the external MOSFETs.
The slow comparator is disabled during the startup
period and the load current can be limited in two ways:
1) Slowly enhancing the MOSFETs by limiting the
MOSFET gate-charging current.
2) Limiting the voltage across the external current-
sense resistor.
During the startup period, the gate-drive current is limit-
ed to 100µA and decreases with the increase of the
gate voltage (see the
Typical Operating Characteristics
).
This allows the controller to slowly enhance the
MOSFETs. If the fast comparator detects an overcur-
rent, the MAX5927A/MAX5929A–MAX5929D regulate
the gate voltage to ensure that the voltage across the
sense resistor does not exceed V
SU,TH
. This effectively
regulates the inrush current during startup.
Figure 6 shows the startup waveforms. STAT_ is assert-
ed immediately after the startup period if no fault condi-
tion is present.
VariableSpeed/BiLevel Fault Protection
VariableSpeed/BiLevel fault protection incorporates
comparators with different thresholds and response
times to monitor the load current (Figure 7). During the
startup period, protection is provided by limiting the
load current. Protection is provided in normal operation
(after the startup period has expired) by discharging
the MOSFET gates with a 3mA/50mA pulldown current
in response to a fault condition. After a fault, STAT_ is
deasserted, the MAX5929A/MAX5929B stays latched
off and the MAX5929C/MAX5929D automatically
restart. Use the MAX5927A LATCH input to control
whether the STAT_ outputs latch off or autoretry after a
fault condition (see the
Latched and Autoretry Fault
Management
section).
MAX5927A/MAX5929A–MAX5929D
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
____________________________________________________________________________________________________________________________________________________________________________________________________________
13
Figure 4. Power-Sequencing Fault Turn-Off
ON1 = ON2 = ON3 = ON4
OVERCURRENT
FAULT
CONDITION
OUT1
OUT2
OUT3
OUT4
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY
OF THE LOAD RESISTANCE AND CAPACITANCE.
*
*
*
*
MAX5927A/MAX5929A–MAX5929D
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
14
____________________________________________________________________________________________________________________________________________________________________________
ON1
ON2
ON3
ON4
IN1
IN2
IN3
IN4
OUT1
OUT2
OUT3
OUT4
V
UVLO
(2.45V)
V
PWRRDY
(0.95V)
V
PWRRDY
(0.95V)
V
PWRRDY
(0.95V)
V
PWRRDY
(0.95V)
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY OF THE LOAD RESISTANCE AND CAPACITANCE.
t
D, UVLO
*
*
*
*
Figure 5. Independent Mode Timing Diagram
Slow-Comparator Startup Period
The slow comparator is disabled during the startup
period while the external MOSFETs are turning on.
Disabling the slow comparator allows the device to
ignore the higher-than-normal inrush current charging
the board capacitors when a card is first plugged into a
live backplane.
Slow-Comparator Normal Operation
After the startup period is complete, the slow compara-
tor is enabled and the device enters normal operation.
The comparator threshold voltage (V
SC,TH
) is
adjustable from 25mV to 100mV. The slow-comparator
response time is 3ms for a 1mV overdrive. The
response time decreases to 100µs with a large over-
drive. The variable-speed response time allows the
MAX5927A/MAX5929A–MAX5929D to ignore low-
amplitude momentary glitches, thus increasing
system noise immunity. After an extended overcurrent
condition, a fault is generated, STAT_ outputs are
deasserted, and the MOSFET gates are discharged
with a 3mA pulldown current.
Fast-Comparator Startup Period
During the startup period, the fast comparator regu-
lates the gate voltages to ensure that the voltage
across the sense resistor does not exceed the startup
fast-comparator threshold voltage (V
SU,TH
), V
SU,TH
is
scaled to two times the slow-comparator threshold
(V
SC,TH
).
Fast-Comparator Normal Operation
In normal operation, if the load current reaches the fast-
comparator threshold, a fault is generated, STAT_ is
deasserted, and the MOSFET gates are discharged
with a strong 50mA pulldown current. This happens in
the event of a serious current overload or a dead short.
The fast-comparator threshold voltage (V
FC,TH
) is
scaled to two times the slow-comparator threshold
(V
SC,TH
). This comparator has a fast response time of
200ns (Figure 7).
Undervoltage Lockout (UVLO)
The UVLO prevents the MAX5927A/MAX5929A–
MAX5929D from turning on the external MOSFETs until
one input voltage exceeds the UVLO threshold (2.45V)
for t
D,UVLO
. The MAX5927A/MAX5929A–MAX5929D
use power from the highest input voltage rail for the
charge pumps. This allows for more efficient charge-
pump operation. The highest V
IN_
is provided as an
output at BIAS. The UVLO protects the external
MOSFETs from an insufficient gate-drive voltage.
MAX5927A/MAX5929A–MAX5929D
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
____________________________________________________________________________________________________________________________________________________________________________
15
Figure 6. Independent Mode Startup Waveforms
t
ON
V
DRIVE
V
GATE_
V
GATE_
ON_
STAT_
V
TH
V
OUT_
V
OUT_
I
LOAD_
t
START
C
BOARD_
= LARGE
C
BOARD_
= 0
V
FC,TH
R
SENSE_
Figure 7. VariableSpeed/BiLevel Response
SENSE VOLTAGE (V
IN
- V
SENSE
)
TURN-OFF TIME
V
SC,TH
V
FC,TH
(2 x V
SC,TH
)
3ms
130μs
200ns
SLOW
COMPARATOR
FAST
COMPARATOR

MAX5929AEEG+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Hot Swap Voltage Controllers Quad Hot-Swap Controller
Lifecycle:
New from this manufacturer.
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