LTC4315IMS#TRPBF Datasheet LTC4315IMS#TRPBF, LTC4315CMS#PBF, LTC4315CDE#PBF | P16-P18

LTC4315

4315f

APPLICATIONS INFORMATION

First, when two or more buffers are connected in a cas-

cade configuration, if the sum of the offsets across the

cascade (refer to Equation 3 and the data sheets of the

corresponding buffers) plus the worst-case driven logic

low voltage exceeds the minimum buffer turn-off voltage,

signals will not be propagated across the cascade. The

maximum driven logic low voltage must be set accord-

ingly, for correct operation in such cascades.

Second, noise margin is affected by cascading the LTC4315

with buffers whose RTA turn-on voltage is lower than the

LTC4315 buffer turn-off voltage. The V

for the LTC4315

is set to 0.3 • V

MIN

to achieve high noise margin provided

that the LTC4315 buffers do not contend with RTAs of

other products. To maximize logic low noise margin,

disable the RTAs of the other LTC buffers if possible and

use the RTAs of the LTC4315 in cascading applications.

To permit interoperability with other LTC buffers whose

RTAs cannot be disabled, the LTC4315 senses the RTA

current and turns off its buffers below 0.3 • V

MIN

. This

eliminates contention between the LTC4315 buffers and

other RTAs, making the SDA/SCL waveforms monotonic.

Figure 10. The LTC4315 Operating in a Cascade with Other LTC Buffers with Active RTAs. Only the Clock Pathway Is Shown for Simplicity

Figure 11. Corresponding SCL Switching Waveforms. No Glitches

Are Seen.

Figure 10 shows the LTC4315 operating on a bus shared

with LTC4300A and LTC4307 buffers. The correspond-

ing SCL waveforms are shown in Figure 11. The RTAs

on the LTC4300A and the LTC4307 cannot be disabled.

The backplane in Figure 11 has five I/O cards connected

to it. Each I/O card has a LTC bus buffer on its outside

edge for SDA/SCL hot swap onto the backplane. In this

4315 F10

LTC4315

GND

CC2

SCLOUTSCLIN

ACC

SCL1

2.7k

0.01µF

3.3V

I/O CARD #1 I/O CARD #2 TO #4

I/O CARD #5

CB1

100pF

*CB2

690pF

*PARASITIC BACKPLANE CAPACITANCE

2.7k

SCL2

BACKPLANE

LTC4300A

GND

SCLOUTSCLIN SCL3

LTC4307

GND

SCLOUTSCLIN

SCL4

1µs/DIV

SCL3

2V/DIV

SCL2

2V/DIV

SCL1

2V/DIV

4315 F11

LTC4315

RTA

TURNS ON

LTC4300A/

LTC4307

RTAs

TURN ON

LTC4315

BUFFERS

TURN OFF

LTC4315

4315f

APPLICATIONS INFORMATION

example, there are three LTC4300As, one LTC4307 and

one LTC4315. The SCL1 bus is driven by an I

C master

(master not shown). When the SCL2 voltage crosses

0.6V and 0.8V, the RTAs on the LTC4300A and LTC4307

turn on respectively and source current into SCL2. The

LTC4315 detects this and turns off its buffers, releasing

SCL1 and SCL2 high. Contention between the LTC4315

buffers and the LTC4300A and LTC4307 RTAs is prevented

and the SCL1, SCL2 and SCL3 waveforms in Figure 11 are

monotonic. The logic low noise margin is reduced because

the LTC4315 buffers turn off when the SCL1 voltage is

approximately 0.6V.

Generally, noise margin will be reduced if other RTAs

turn on at a voltage less than 0.3 • V

MIN

. The reduction

in noise margin is a function of the number of LTC4315s

and the number and turn-on voltage of other RTAs, whose

current must be sunk by the LTC4315 buffers. The same

arguments apply for non-LTC buffer products whose RTA

turn-on voltage is less than 0.3 • V

MIN

I n t e r o p e r a b i l i t y i s i m p r o v e d b y r e d u c i n g t h e i n t e r a c t i o n t i m e

between the LTC4315 buffers and other RTAs by reducing

R1 and CB1. The following guidelines are recommended

for single supply systems,

a. For 5V systems choose R1 < 20k and CB1 < 1nF. There

are no other constraints.

b. For 3.3V systems, refer to Figures 12 and 13 for opera-

tion with LTC4300As and LTC4307s. In the figures:

M =

Number of LTC4300As or LTC4307s

Number of LTC4315s

R1 and CB1 must be chosen to be below the curves for a

specific value of M. For M greater than the values shown

in the figures, non-idealities do not result. R1 < 20k and

CB1 <1nF are still recommended.

Figure 12. Recommended Maximum R1 and CB1 Values for the

LTC4315 Operating with Multiple LTC4300As in a 3.3V System.

Figure 13. Recommended Maximum R1 and CB1 Values for the

LTC4315 Operating with Multiple LTC4307s in a 3.3V System.

BUS

(k)

BUS

(pF)

1000

100

4315 F12

1068

M = 1

M = 2

M = 3

BUS

(k)

BUS

(pF)

10000

1000

100

4315 F13

1068

M = 1

LTC4315

4315f

APPLICATIONS INFORMATION

The LTC4315 is interoperable with non-compliant I

devices that drive a high V

> 0.4V. Figure 14 shows the

LTC4315 in an application where a microcontroller com-

municates through the LTC4315 with a non-compliant I

device that drives a V

of 0.6V. The LTC4313 buffers are

active up to a bus voltage of 0.3 • V

MIN

which is 1.089V in

this case, yielding a noise margin of 0.489V.

Figure 15. LTC4315s in a Repeater Application

LTC4315

GND

CC2

4315 F15

READY

SCLOUT

SDAOUT

FAULT

DISCEN

ENABLE

SCLIN

SDAIN

ACC

SCL1

SDA1

10k

0.01µF

3.3V

LTC4315

GND

CC2

READY

SCLOUT

SDAOUT

FAULT

DISCEN

ENABLE

SCLIN

SDAIN

ACC

10k

LTC4315

GND

CC2

READY

SCLOUT

SDAOUT

FAULT

DISCEN

ENABLE

SCLIN

SDAIN

ACC

10k

R10

10k

SCL2

SDA2

READY

FAULT

Repeater Application

Multiple LTC4315s can be cascaded in a repeater applica-

tion where a large 2-wire system is broken into smaller

sections as shown in Figure 15. The high noise margin

and low offset of the LTC4315 allows multiple devices

to be cascaded while still providing good system level

noise margin. In the repeater circuit shown in Figure 15,

if SCL1/SDA1 is driven externally to 200mV, SCL2/SDA2

is regulated to ~440mV worst-case by the cascade of

LTC4315s. The buffer turn-off voltage is 1.089V yielding

a minimum logic low noise margin of ~650mV. In Figure

15, use of RTAs combined with an increased level of

buffering reduces transition times and permits operation

at a higher frequency.

Figure 14. Communication with a Non-Compliant I

C Device

Using the LTC4315.

LTC4315

GND

CC2

4315 F14

SCLOUT

SDAOUT

DISCEN

ENABLE

FAULT

READY

SCLIN

SDAIN

ACC

10k

NON-COMPLIANT

C DEVICE

= 0.6V

3.3V

µP

0.01µF

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P20

LTC4315IMS#TRPBF

Mfr. #:

Buy LTC4315IMS#TRPBF

Manufacturer:

Analog Devices Inc.

Description:

Interface - Signal Buffers, Repeaters 2-Wire Bus Buffer with High Noise Margin w/ FAULT and SBDR Disable

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LTC4315IMS#TRPBF

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