1
®
FN8099.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved
*I
2
C is a Trademark of Philips. All other trademarks mentioned are the property of their respective owners.
X1227
2-Wire
RTC Real TimeClock/Calendar/
CPU Supervisor with EEPROM
FEATURES
Real Time Clock/Calendar
Tracks Time in Hours, Minutes, and Seconds
Day of the Week, Day, Month, and Year
2 Polled Alarms (Non-volatile)
Settable on the Second, Minute, Hour, Day of the
Week, Day, or Month
Repeat Mode (periodic interrupts)
Oscillator Compensation on Chip
Internal Feedback Resistor and Compensation
Capacitors
64 Position Digitally Controlled Trim Capacitor
6 Digital Frequency Adjustment Settings to ±30ppm
CPU Supervisor Functions
Power-On Reset, Low Voltage Sense
Watchdog Timer (SW Selectable: 0.25s, 0.75s,
1.75s, off)
Battery Switch or Super Cap Input
512 x 8 Bits of EEPROM
64-Byte Page Write Mode
8 Modes of Block Lock™ Protection
Single Byte Write Capability
High Reliability
Data Retention: 100 Years
Endurance: 100,000 Cycles Per Byte
2-Wire™ Interface Interoperable with I
2
C*
400kHz Data Transfer Rate
Low Power CMOS
1.25µA Operating Current (Typical)
Small Package Options
8 Ld SOIC and 8 Ld TSSOP
Repetitive Alarms
Temperature Compensation
Pb-Free Plus Anneal Available (RoHS Compliant)
APPLICATIONS
Utility Meters
HVAC Equipment
Audio/Video Components
Set Top Box/Television
•Modems
Network Routers, Hubs, Switches, Bridges
Cellular Infrastructure Equipment
Fixed Broadband Wireless Equipment
Pagers/PDA
POS Equipment
Test Meters/Fixtures
Office Automation (Copiers, Fax)
Home Appliances
Computer Products
Other Industrial/Medical/Automotive
DESCRIPTION
The X1227 device is a Real Time Clock with
clock/calendar, two polled alarms with integrated 512x8
EEPROM, oscillator compensation, CPU Supervisor
(POR/LVS and WDT) and battery backup switch.
The oscillator uses an external, low-cost 32.768kHz
crystal. All compensation and trim components are
integrated on the chip. This eliminates several external
discrete components and a trim capacitor, saving
board area and component cost.
BLOCK DIAGRAM
X1
X2
Oscillator
Frequency
Timer
Logic
Divider
Calendar
8
Control/
Registers
1Hz
Time
Keeping
Registers
Alarm Regs
Compare
Mask
RESET
Control
Decode
Logic
Alarm
(EEPROM)
(EEPROM)
SCL
SDA
Serial
Interface
Decoder
4K
EEPROM
ARRAY
Watchdog
Timer
Low Voltage
Reset
Registers
Status
(SRAM)
V
CC
V
BACK
32.768kHz
(SRAM)
Battery
Circuitry
Switch
OSC
Compensation
Data Sheet May 8, 2006
N
O
T
R
E
C
O
M
M
E
N
D
E
D
F
O
R
N
E
W
D
E
S
I
G
N
S
S
E
E
I
S
L
1
2
0
2
7
2
FN8099.2
May 8, 2006
ORDERING INFORMATION
PART NUMBER PART MARKING V
CC
RANGE (V) V
TRIP
TEMPERATURE
RANGE (°C) PACKAGE PKG. DWG. #
X1227S8-4.5A X1227AL 4.5 to 5.5 4.63V ± 112mV 0 to 70 8 Ld SOIC MDP0027
X1227S8Z-4.5A (Note 1) X1227ZAL 0 to 70 8 Ld SOIC (Pb-free) MDP0027
X1227S8I-4.5A X1227AM -40 to 85 8 Ld SOIC MDP0027
X1227S8IZ-4.5A (Note 1) X1227ZAM -40 to 85 8 Ld SOIC (Pb-free) MDP0027
X1227V8-4.5A 1227AL 0 to 70 8 Ld TSSOP M8.173
X1227V8Z-4.5A (Note 1) 1227ALZ 0 to 70 8 Ld TSSOP (Pb-free) M8.173
X1227V8I-4.5A 1227AM -40 to 85 8 Ld TSSOP M8.173
X1227V8IZ-4.5A (Note 1) 1227AMZ -40 to 85 8 Ld TSSOP (Pb-free) M8.173
X1227S8* X1227 4.38V ± 112mV 0 to 70 8 Ld SOIC MDP0027
X1227S8Z* (Note 1) X1227Z 0 to 70 8 Ld SOIC (Pb-free) MDP0027
X1227S8I X1227I -40 to 85 8 Ld SOIC MDP0027
X1227S8IZ (Note 1) X1227ZI -40 to 85 8 Ld SOIC (Pb-free) MDP0027
X1227V8 1227 0 to 70 8 Ld TSSOP M8.173
X1227V8Z (Note 1) 1227Z 0 to 70 8 Ld TSSOP (Pb-free) M8.173
X1227V8I 1227I -40 to 85 8 Ld TSSOP M8.173
X1227V8IZ (Note 1) 1227IZ -40 to 85 8 Ld TSSOP (Pb-free) M8.173
X1227S8-2.7A X1227AN
2.7 to 5.5
2.85V ± 100mV 0 to 70 8 Ld SOIC MDP0027
X1227S8Z-2.7A (Note 1) X1227ZAN 0 to 70 8 Ld SOIC (Pb-free) MDP0027
X1227S8I-2.7A* X1227AP -40 to 85 8 Ld SOIC MDP0027
X1227S8IZ-2.7A* (Note 1) X1227ZAP -40 to 85 8 Ld SOIC (Pb-free) MDP0027
X1227V8-2.7A 1227AN 0 to 70 8 Ld TSSOP M8.173
X1227V8Z-2.7A (Note 1) 1227ANZ 0 to 70 8 Ld TSSOP (Pb-free) M8.173
X1227V8I-2.7A 1227AP -40 to 85 8 Ld TSSOP M8.173
X1227V8IZ-2.7A (Note 1) 1227APZ -40 to 85 8 Ld TSSOP (Pb-free) M8.173
X1227S8-2.7* X1227F 2.65V ± 100mV 0 to 70 8 Ld SOIC MDP0027
X1227S8Z-2.7 (Note 1) X1227ZF 0 to 70 8 Ld SOIC (Pb-free) MDP0027
X1227S8I-2.7* X1227G -40 to 85 8 Ld SOIC MDP0027
X1227S8IZ-2.7 (Note 1) X1227ZG -40 to 85 8 Ld SOIC (Pb-free) MDP0027
X1227V8-2.7 1227F 0 to 70 8 Ld TSSOP M8.173
X1227V8Z-2.7 (Note 1) 1227FZ 0 to 70 8 Ld TSSOP (Pb-free) M8.173
X1227V8I-2.7 1227G -40 to 85 8 Ld TSSOP M8.173
X1227V8IZ-2.7 (Note 1) 1227GZ -40 to 85 8 Ld TSSOP (Pb-free) M8.173
*Add "T1" suffix for tape and reel.
NOTES:
1. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2. For appropriate volume, any V
TRIP
value from 2.6 to 4.7V may be ordered via Intersil’s Customer Specification Program (CSPEC).
X1227
3
FN8099.2
May 8, 2006
PIN DESCRIPTIONS
PIN ASSIGNMENTS
Pin Number
Symbol Brief DescriptionSOIC TSSOP
13X1X1. The X1 pin is the input of an inverting amplifier and should be connected to one
pin of a 32.768kHz quartz crystal.
24X2X2. The X2 pin is the output of an inverting amplifier and should be connected to
one pin of a 32.768kHz quartz crystal..
35RESET
Reset Output – RESET. This is a reset signal output. This signal notifies a host
processor that the watchdog time period has expired or that the voltage has
dropped below a fixed V
TRIP
threshold. It is an open drain active LOW output.
46V
SS
V
SS
.
57SDASerial Data (SDA). SDA is a bidirectional pin used to transfer data into and out of
the device. It has an open drain output and may be wire ORed with other open drain
or open collector outputs.
68SCLSerial Clock (SCL). The SCL input is used to clock all data into and out of the
device. The input buffer on this pin is always active (not gated).
71V
BACK
V
BACK
. This input provides a backup supply voltage to the device. V
BACK
supplies
power to the device in the event the V
CC
supply fails. This pin can be connected to
a battery, a Supercap or tied to ground if not used.
82V
CC
V
CC
.
NC = No internal connection
X1227
X1
X2
V
BACK
V
CC
RESET
SCL
SDA
V
SS
1
2
3
4
7
8
6
5
8 LD TSSOP
X1227
X1
X2
V
BACK
V
CC
RESET
SCL
SDA
V
SS
1
2
3
4
7
8
6
5
8 LD SOIC
X1227

X1227V8I-2.7

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
IC RTC CLK/CALENDAR I2C 8-TSSOP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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