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PCA85176H/Q900/1,5

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60
PCA85176 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 6 — 7 April 2015 58 of 60
NXP Semiconductors
PCA85176
40 x 4 automotive LCD driver for low multiplex rates
27. Tables
Table 1. Ordering information . . . . . . . . . . . . . . . . . . . . .2
Table 2. Ordering options. . . . . . . . . . . . . . . . . . . . . . . . .2
Table 3. Marking codes . . . . . . . . . . . . . . . . . . . . . . . . . .2
Table 4. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .6
Table 5. Definition of PCA85176 commands . . . . . . . . . .7
Table 6. C bit description . . . . . . . . . . . . . . . . . . . . . . . . .7
Table 7. Mode-set command bit description . . . . . . . . . .8
Table 8. Load-data-pointer command bit description . . . .8
Table 9. Device-select command bit description . . . . . . .9
Table 10. Bank-select command bit description . . . . . . . .9
Table 11. Blink-select command bit description . . . . . . . .10
Table 12. Blink frequencies . . . . . . . . . . . . . . . . . . . . . . .11
Table 13. Selection of possible display configurations . . .12
Table 14. Biasing characteristics . . . . . . . . . . . . . . . . . . .13
Table 15. Standard RAM filling in 1:3 multiplex drive
mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Table 16. Entire RAM filling by rewriting in 1:3 multiplex
drive mode . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Table 17. I
2
C slave address byte . . . . . . . . . . . . . . . . . . .31
Table 18. Limiting values . . . . . . . . . . . . . . . . . . . . . . . . .34
Table 19. Static characteristics . . . . . . . . . . . . . . . . . . . .35
Table 20. Dynamic characteristics . . . . . . . . . . . . . . . . . .37
Table 21. Addressing cascaded PCA85176 . . . . . . . . . .39
Table 22. SnPb eutectic process (from J-STD-020D) . . .47
Table 23. Lead-free process (from J-STD-020D) . . . . . .47
Table 24. Selection of LCD segment drivers . . . . . . . . . .51
Table 25. Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . .53
Table 26. Revision history . . . . . . . . . . . . . . . . . . . . . . . .55
PCA85176 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 6 — 7 April 2015 59 of 60
NXP Semiconductors
PCA85176
40 x 4 automotive LCD driver for low multiplex rates
28. Figures
Fig 1. Block diagram of PCA85176 . . . . . . . . . . . . . . . . .3
Fig 2. Pinning diagram for TQFP64 (PCA85176H) . . . . .4
Fig 3. Pinning diagram for TSSOP56 (PCA85176T) . . . .5
Fig 4. Example of displays suitable for PCA85176 . . . .12
Fig 5. Typical system configuration . . . . . . . . . . . . . . . .13
Fig 6. Electro-optical characteristic: relative
transmission curve of the liquid . . . . . . . . . . . . . .15
Fig 7. Static drive mode waveforms. . . . . . . . . . . . . . . .16
Fig 8. Waveforms for the 1:2 multiplex drive mode
with
1
⁄
2
bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Fig 9. Waveforms for the 1:2 multiplex drive mode
with
1
⁄
3
bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Fig 10. Waveforms for the 1:3 multiplex drive mode
with
1
⁄
3
bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Fig 11. Waveforms for the 1:4 multiplex drive mode
with
1
⁄
3
bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Fig 12. Display RAM bitmap . . . . . . . . . . . . . . . . . . . . . .22
Fig 13. Relationship between LCD layout, drive mode,
display RAM filling order, and display data
transmitted over the I
2
C-bus . . . . . . . . . . . . . . . .23
Fig 14. RAM banks in static and multiplex driving
mode 1:2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
Fig 15. Bank selection . . . . . . . . . . . . . . . . . . . . . . . . . . .27
Fig 16. Example of the Bank-select command with
multiplex drive mode 1:2 . . . . . . . . . . . . . . . . . . .28
Fig 17. Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
Fig 18. Definition of START and STOP conditions. . . . . .29
Fig 19. System configuration . . . . . . . . . . . . . . . . . . . . . .30
Fig 20. Acknowledgement of the I
2
C-bus . . . . . . . . . . . .30
Fig 21. I
2
C-bus protocol. . . . . . . . . . . . . . . . . . . . . . . . . .32
Fig 22. Format of command byte. . . . . . . . . . . . . . . . . . .32
Fig 23. Device protection circuits. . . . . . . . . . . . . . . . . . .33
Fig 24. Typical I
DD
with respect to V
DD
. . . . . . . . . . . . . .36
Fig 25. Driver timing waveforms . . . . . . . . . . . . . . . . . . .38
Fig 26. I
2
C-bus timing waveforms . . . . . . . . . . . . . . . . . .38
Fig 27. Cascaded PCA85176 configuration. . . . . . . . . . .40
Fig 28. Synchronization of the cascade for the various
PCA85176 drive modes. . . . . . . . . . . . . . . . . . . .41
Fig 29. Package outline SOT357-1 (TQFP64) of
PCA85176H. . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
Fig 30. Package outline SOT364-1 (TSSOP56) of
PCA85176T . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43
Fig 31. Temperature profiles for large and small
components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
Fig 32. Footprint information for reflow soldering of
SOT357-1 (TQFP64) of PCA85176H . . . . . . . . .49
Fig 33. Footprint information for reflow soldering of
SOT364-1 (TSSOP56) of PCA85176T . . . . . . . .50
NXP Semiconductors
PCA85176
40 x 4 automotive LCD driver for low multiplex rates
© NXP Semiconductors N.V. 2015. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 7 April 2015
Document identifier: PCA85176
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
29. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
3.1 Ordering options. . . . . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6
7 Functional description . . . . . . . . . . . . . . . . . . . 7
7.1 Commands of PCA85176. . . . . . . . . . . . . . . . . 7
7.1.1 Command: mode-set . . . . . . . . . . . . . . . . . . . . 8
7.1.2 Command: load-data-pointer . . . . . . . . . . . . . . 8
7.1.3 Command: device-select . . . . . . . . . . . . . . . . . 9
7.1.4 Command: bank-select. . . . . . . . . . . . . . . . . . . 9
7.1.5 Command: blink-select. . . . . . . . . . . . . . . . . . 10
7.1.5.1 Blinking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
7.2 Power-On Reset (POR) . . . . . . . . . . . . . . . . . 11
7.3 Possible display configurations . . . . . . . . . . . 12
7.3.1 LCD bias generator . . . . . . . . . . . . . . . . . . . . 13
7.3.2 Display register. . . . . . . . . . . . . . . . . . . . . . . . 13
7.3.3 LCD voltage selector . . . . . . . . . . . . . . . . . . . 13
7.3.3.1 Electro-optical performance . . . . . . . . . . . . . . 15
7.3.4 LCD drive mode waveforms . . . . . . . . . . . . . . 16
7.3.4.1 Static drive mode . . . . . . . . . . . . . . . . . . . . . . 16
7.3.4.2 1:2 Multiplex drive mode. . . . . . . . . . . . . . . . . 17
7.3.4.3 1:3 Multiplex drive mode. . . . . . . . . . . . . . . . . 19
7.3.4.4 1:4 Multiplex drive mode. . . . . . . . . . . . . . . . . 20
7.4 Oscillator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.4.1 Internal clock . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.4.2 External clock . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.4.3 Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.5 Backplane and segment outputs . . . . . . . . . . 21
7.5.1 Backplane outputs . . . . . . . . . . . . . . . . . . . . . 21
7.5.2 Segment outputs. . . . . . . . . . . . . . . . . . . . . . . 21
7.6 Display RAM. . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.6.1 Data pointer . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7.6.2 Subaddress counter . . . . . . . . . . . . . . . . . . . . 24
7.6.3 RAM writing in 1:3 multiplex drive mode. . . . . 25
7.6.4 Writing over the RAM address boundary . . . . 26
7.6.5 Bank selection . . . . . . . . . . . . . . . . . . . . . . . . 26
7.6.5.1 Output bank selector . . . . . . . . . . . . . . . . . . . 26
7.6.5.2 Input bank selector . . . . . . . . . . . . . . . . . . . . . 26
7.6.5.3 RAM bank switching. . . . . . . . . . . . . . . . . . . . 26
8 Characteristics of the I
2
C-bus . . . . . . . . . . . . 29
8.1 Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8.2 START and STOP conditions. . . . . . . . . . . . . 29
8.3 System configuration . . . . . . . . . . . . . . . . . . . 29
8.4 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . 30
8.5 I
2
C-bus controller. . . . . . . . . . . . . . . . . . . . . . 31
8.6 Input filters . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
8.7 I
2
C-bus protocol. . . . . . . . . . . . . . . . . . . . . . . 31
9 Internal circuitry . . . . . . . . . . . . . . . . . . . . . . . 33
10 Safety notes. . . . . . . . . . . . . . . . . . . . . . . . . . . 34
11 Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 34
12 Static characteristics . . . . . . . . . . . . . . . . . . . 35
13 Dynamic characteristics. . . . . . . . . . . . . . . . . 37
14 Application information . . . . . . . . . . . . . . . . . 39
14.1 Cascaded operation. . . . . . . . . . . . . . . . . . . . 39
15 Test information . . . . . . . . . . . . . . . . . . . . . . . 41
15.1 Quality information. . . . . . . . . . . . . . . . . . . . . 41
16 Package outline. . . . . . . . . . . . . . . . . . . . . . . . 42
17 Handling information . . . . . . . . . . . . . . . . . . . 44
18 Packing information . . . . . . . . . . . . . . . . . . . . 45
18.1 Tape and reel information . . . . . . . . . . . . . . . 45
19 Soldering of SMD packages. . . . . . . . . . . . . . 46
19.1 Introduction to soldering. . . . . . . . . . . . . . . . . 46
19.2 Wave and reflow soldering. . . . . . . . . . . . . . . 46
19.3 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . 46
19.4 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . 47
20 Footprint information . . . . . . . . . . . . . . . . . . . 49
21 Appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
21.1 LCD segment driver selection . . . . . . . . . . . . 51
22 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 53
23 References. . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
24 Revision history . . . . . . . . . . . . . . . . . . . . . . . 55
25 Legal information . . . . . . . . . . . . . . . . . . . . . . 56
25.1 Data sheet status. . . . . . . . . . . . . . . . . . . . . . 56
25.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
25.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 56
25.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 57
26 Contact information . . . . . . . . . . . . . . . . . . . . 57
27 Tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
28 Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
29 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60

PCA85176H/Q900/1,5

Mfr. #:
Buy PCA85176H/Q900/1,5
Manufacturer:
NXP Semiconductors
Description:
LCD Drivers 40 SGMT 4800Hz
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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