DQ Map
Table 6: Component-to-Module DQ Map
Component
Reference
Number
Component
DQ Module DQ
Module Pin
Number
Component
Reference
Number
Component
DQ Module DQ
Module Pin
Number
U1 0 0 5 U2 0 4 3
1 1 150 1 5 148
2 2 12 2 6 10
3 3 157 3 7 155
U3 0 8 16 U4 0 12 14
1 9 161 1 13 159
2 10 23 2 14 21
3 11 168 3 15 166
U5 0 16 27 U6 0 20 25
1 17 172 1 21 170
2 18 34 2 22 32
3 19 179 3 23 177
U7 0 24 38 U8 0 28 36
1 25 183 1 29 181
2 26 45 2 30 43
3 27 190 3 31 188
U9 0 32 97 U10 0 36 95
1 33 242 1 37 240
2 34 104 2 38 102
3 35 249 3 39 247
U11 0 40 108 U12 0 44 106
1 41 253 1 45 251
2 42 115 2 46 113
3 43 260 3 47 258
U13 0 48 119 U14 0 52 117
1 49 264 1 53 262
2 50 126 2 54 124
3 51 271 3 55 269
U15 0 56 130 U16 0 60 128
1 57 275 1 61 273
2 58 137 2 62 135
3 59 282 3 63 280
U17 0 CB0 49 U18 0 CB4 47
1 CB1 194 1 CB5 192
2 CB2 56 2 CB6 54
3 CB3 201
3 CB7 199
8GB (x72, ECC, SR) 288-Pin DDR4 Nonvolatile RDIMM
DQ Map
PDF: 09005aef85c5dc9c
asf18c1gx72pf1z.pdf - Rev. C 03/16 EN
10
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2014 Micron Technology, Inc. All rights reserved.
Functional Block Diagram
Figure 3: Functional Block Diagram
DQ
DQ
DQ
DQ
ZQ
DQ0
DQ1
DQ2
DQ3
U1
DQ
DQ
DQ
DQ
ZQ
DQ4
DQ5
DQ6
DQ7
U2
DQS0_t
DQS0_c
DQS9_t
DQS9_c
DQ
DQ
DQ
DQ
ZQ
DQ8
DQ9
DQ10
DQ11
U3
DQ
DQ
DQ
DQ
ZQ
DQ12
DQ13
DQ14
DQ15
U4
DQS1_t
DQS1_c
DQS10_t
DQS10_c
DQ
DQ
DQ
DQ
ZQ
DQ16
DQ17
DQ18
DQ19
U5
DQ
DQ
DQ
DQ
ZQ
DQ20
DQ21
DQ22
DQ23
U6
DQS2_t
DQS2_c
DQS11_t
DQS11_c
DQ
DQ
DQ
DQ
ZQ
DQ24
DQ25
DQ26
DQ27
U7
DQ
DQ
DQ
DQ
ZQ
DQ28
DQ29
DQ30
DQ31
U8
DQS3_t
DQS3_c
DQS12_t
DQS12_c
DQ
DQ
DQ
DQ
ZQ
CB0
CB1
CB2
CB3
U17
DQ
DQ
DQ
DQ
ZQ
CB4
CB5
CB6
CB7
Vss
Vss
Vss
Vss
Vss
U18
DQS8_t
DQS8_c
DQS17_t
DQS17_c
DQ
DQ
DQ
DQ
ZQ
DQ32
DQ33
DQ34
DQ35
U9
DQ
DQ
DQ
DQ
ZQ
DQ36
DQ37
DQ38
DQ39
U10
DQS4_t
DQS4_c
DQS13_t
DQS13_c
DQ
DQ
DQ
DQ
ZQ
DQ40
DQ41
DQ42
DQ43
U11
DQ
DQ
DQ
DQ
ZQ
DQ44
DQ45
DQ46
DQ47
U12
DQS5_t
DQS5_c
DQS14_t
DQS14_c
DQ
DQ
DQ
DQ
ZQ
DQ48
DQ49
DQ50
DQ51
U13
DQ
DQ
DQ
DQ
ZQ
DQ52
DQ53
DQ54
DQ55
U14
DQS6_t
DQS6_c
DQS15_t
DQS15_c
DQ
DQ
DQ
DQ
ZQ
DQ56
DQ57
DQ58
DQ59
U15
DQ
DQ
DQ
DQ
ZQ
DQ60
DQ61
DQ62
DQ63
U16
DQS7_t
DQS7_c
DQS16_t
DQS16_c
A/B-CS0_n
U7
A/B-CS0_n, A/B-BA[1:0]A/B-BG[1:0],
A/B-ACT_n, A/B-A[17, 13:0], A/B-RAS_n/A16,
A/B-CAS_n/A15, A/B-WE_n/A14,
A/B-CKE0, A/B-ODT0
CK[1:0]_t
CK[1:0]_c
Command, control, address, and clock line terminations:
DDR4
SDRAM
DDR4
SDRAM
U1
A0
SPD EEPROM/
Temperature
sensor
A1 A2
SA0
SA1
SDA
SCL
EVT
EVENT#
CS_n DQS_t DQS_c
CS_n DQS_t DQS_c
CS_n DQS_t DQS_c
CS_n DQS_t DQS_c
CS_n DQS_t DQS_c
CS_n DQS_t DQS_c
CS_n DQS_t DQS_c
CS_n DQS_t DQS_c
CS_n DQS_t DQS_c
CS_n DQS_t DQS_c
CS_n DQS_t DQS_c
CS_n DQS_t DQS_c
CS_n DQS_t DQS_c
CS_n DQS_t DQS_c
CS_n DQS_t DQS_c
CS_n DQS_t DQS_c
CS_n DQS_t DQS_c
CS_n DQS_t DQS_c
SA2
V
REFCA
V
SS
DDR4 SDRAM, Register
DDR4 SDRAM, Register
V
DD
V
DD
V
TT
Control, command and
address termination
V
DDSPD
SPD EEPROM/Temp Sensor,
Register
V
TT
DDR4 SDRAM, Register
DDR4 SDRAM
V
PP
CS0_n
BA[1:0]
BG[1:0]
ACT_n
A[17, 13:0]
RAS_n/A16
CAS_n/A15
WE_n/A14
CKE0
ODT0
PAR_IN
ALERT_CONN_N
A/B-CS0_n: Rank 0
A/B-BA[1:0]: DDR4 SDRAM
A/B-BG[1:0]: DDR4 SDRAM
A/B-ACT_n: DDR4 SDRAM
A/B-A[17,13:0]: DDR4 SDRAM
A/B-RAS_n/A16: DDR4 SDRAM
A/B-CAS_n/A15: DDR4 SDRAM
A/B-WE_n/A14: DDR4 SDRAM
A/B-CKE0: Rank 0
A/B-ODT0: Rank 0
A/B-PAR: DDR4 SDRAM
ALERT_DRAM: DDR4 SDRAM
R
E
G
I
S
T
E
R
&
P
L
L
RESET_n
CK_t
CK_c
CK[1:0]_c
DDR4 SDRAM
QRST_N: DDR4 SDRAM
CK[1:0]_t
ZQ
V
SS
SA0
SA1
SA2
SCL
SDA
V
SS
V
SS
V
SS
V
SS
Vss
Vss
Vss
Vss
Vss
V
SS
V
SS
V
SS
V
SS
Note:
1. The ZQ ball on each DDR4 component is connected to an external 240Ω ±1% resistor
that is tied to ground. It is used for the calibration of the component’s ODT and output
driver.
8GB (x72, ECC, SR) 288-Pin DDR4 Nonvolatile RDIMM
Functional Block Diagram
PDF: 09005aef85c5dc9c
asf18c1gx72pf1z.pdf - Rev. C 03/16 EN
11
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2014 Micron Technology, Inc. All rights reserved.
Micron NVDIMM General Description
Micron NVDIMM is a new class of nonvolatile memory developed to meet the need for
higher-density, higher-performance memory for enterprise-class storage and server ap-
plications. By combining DRAM, flash, an intelligent system controller, and an ultraca-
pacitor power source, Micron NVDIMM provides a highly reliable memory subsystem
that runs with the latency and endurance of the fastest DRAM, and with the persistence
of flash. Until recently, designers have reluctantly used batteries to maintain their data
during power outages. Others have moved toward new flash-based technologies for
memory persistence, but this option falls short of DRAM in terms of latency, speed, en-
durance, and reliability. Micron NVDIMM enables the fastest possible system perform-
ance while eliminating the many problems associated with batteries, such as hazardous
material disposal, short operating life, and extensive maintenance.
The Micron DDR4 NVDIMM has been specifically designed to operate with host sys-
tems that have implemented the asynchronous DRAM refresh (ADR) feature, although
it is possible to integrate into systems that do not have this enabled. Please contact Mi-
cron for more details on system integration requirements and instructions.
During normal operation, bypass mode, the Micron DDR4 NVDIMM appears as a
standard registered DDR4 DIMM to the host system, providing all the benefits and
speed of a high-speed, high-density SDRAM. In the event of a power loss, the Micron
NVDIMM controller can be commanded to take control of the SDRAM, transferring its
contents to flash memory using energy from its own battery-free power source or from a
system-level persistent power source, thereby preserving all of the SDRAM data. After
power is restored, the Micron NVDIMM controller can be commanded to transfer the
contents from the flash back to the SDRAM and return control to the host system.
Below are a few of the cases that can take advantage of the features of an NVDIMM:
Nonvolatile write cache for RAID controllers
Metadata storage
Whole system persistence
Unified memory architecture
Uninterruptable power source (UPS) replacement/complement
DDR4 RDIMM Functionality
DDR4 SDRAM modules are high-speed, CMOS dynamic random access memory mod-
ules that use internally configured 16-bank DDR4 SDRAM devices. DDR4 SDRAM mod-
ules use DDR architecture to achieve high-speed operation. DDR4 is essentially an 8n-
prefetch architecture with an interface designed to transfer two data words per clock cy-
cle at the I/O pins. A single read or write access for the DDR4 SDRAM module effectively
consists of a single 8n-bit-wide, one-clock-cycle data transfer at the internal DRAM core
and eight corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins.
DDR4 modules use two sets of differential signals: DQS/DQS# to capture data and
CK/CK# to capture commands, addresses, and control signals. Differential clocks and
data strobes ensure exceptional noise immunity for these signals and provide precise
crossing points to capture input signals.
8GB (x72, ECC, SR) 288-Pin DDR4 Nonvolatile RDIMM
Micron NVDIMM General Description
PDF: 09005aef85c5dc9c
asf18c1gx72pf1z.pdf - Rev. C 03/16 EN
12
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2014 Micron Technology, Inc. All rights reserved.

MTA18ASF1G72PF1Z-2G1T12AB

Mfr. #:
Manufacturer:
Micron
Description:
MODULE DDR4 NVDIMM 8GB NVRDIMM-N
Lifecycle:
New from this manufacturer.
Delivery:
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Payment:
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