LT3082
13
3082f
APPLICATIONS INFORMATION
Tables 3 through 5 list thermal resistance as a function
of copper areas in a fi xed board size. All measurements
were taken in still air on a 4-layer FR-4 board with 1oz
solid internal planes and 2oz external trace planes with a
total fi nished board thickness of 1.6mm.
Table 3. DD Package, 8-Lead DFN
COPPER AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
TOPSIDE* BACKSIDE BOARD AREA
2500mm
2
2500mm
2
2500mm
2
25°C/W
1000mm
2
2500mm
2
2500mm
2
25°C/W
225mm
2
2500mm
2
2500mm
2
28°C/W
100mm
2
2500mm
2
2500mm
2
32°C/W
*Device is mounted on topside
Table 4. TS8 Package, 8-Lead SOT-23
COPPER AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
TOPSIDE* BACKSIDE BOARD AREA
2500mm
2
2500mm
2
2500mm
2
54°C/W
1000mm
2
2500mm
2
2500mm
2
54°C/W
225mm
2
2500mm
2
2500mm
2
57°C/W
100mm
2
2500mm
2
2500mm
2
63°C/W
*Device is mounted on topside
Table 5. ST Package, 3-Lead SOT-223
COPPER AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
TOPSIDE* BACKSIDE BOARD AREA
2500mm
2
2500mm
2
2500mm
2
20°C/W
1000mm
2
2500mm
2
2500mm
2
20°C/W
225mm
2
2500mm
2
2500mm
2
24°C/W
100mm
2
2500mm
2
2500mm
2
29°C/W
*Device is mounted on topside
For further information on thermal resistance and using thermal information,
refer to JEDEC standard JESD51, notably JESD51-12.
PCB layers, copper weight, board layout and thermal vias
affect the resultant thermal resistance. Please reference
JEDEC standard JESD51-7 for further information on high
thermal conductivity test boards. Achieving low thermal
resistance necessitates attention to detail and careful layout.
Demo circuit 1447As board layout using multiple inner
V
OUT
planes and multiple thermal vias achieves 28°C/W
performance for the DFN package.
Calculating Junction Temperature
Example: Given an industrial factory application with an
input voltage of 15V ±10%, an output voltage of 12V ±5%,
an output current of 200mA and a maximum ambient
temperature of 50°C, what would be the maximum junc-
tion temperature for a DFN package?
The total circuit power equals:
P
TOTAL
= (V
IN
– V
OUT
)(I
OUT
)
The SET pin current is negligible and can be ignored.
V
IN(MAX CONTINUOUS)
= 16.5 (15V + 10%)
V
OUT(MIN CONTINUOUS)
= 11.4V (12V – 5%)
I
OUT
= 200mA
Power dissipation under these conditions equals:
P
TOTAL
= (16.5 – 11.4V)(200mA) = 1.02W
Junction temperature equals:
T
J
= T
A
+ P
TOTAL
θ
JA
T
J
= 50°C + (1.02W • 30°C/W) = 80.6°C
In this example, junction temperature is below the maxi-
mum rating, ensuring reliable operation.
LT3082
14
3082f
TYPICAL APPLICATIONS
DAC-Controlled Regulator
Two-Level Regulator
Protection Features
The LT3082 incorporates several protection features ideal
for battery-powered circuits, among other applications. In
addition to normal monolithic regulator protection features
such as current limiting and thermal limiting, the LT3082
protects itself against reverse-input voltages, reverse-
output voltages, and reverse OUT-to-SET pin voltages.
Current limit protection and thermal overload protection
protect the IC against output current overload conditions.
For normal operation, do not exceed a junction temperature
of 125°C. The thermal shutdown circuit’s temperature
threshold is typically 165°C and incorporates about 5°C
of hysteresis.
The LT3082’s IN pin withstands ±40V voltages with respect
to the OUT and SET pins. Reverse current fl ow, if OUT is
greater than IN, is less than 1mA (typically under 100µA),
protecting the LT3082 and sensitive loads.
Clamping diodes and 1k limiting resistors protect the
LT3082’s SET pin relative to the OUT pin voltage. These
protection components typically only carry current under
transient overload conditions. These devices are sized to
handle ±10V differential voltages and ±15mA crosspin
current fl ow without concern. Relative to these application
concerns, note the following two scenarios. The fi rst sce-
nario employs a noise-reducing SET pin bypass capacitor
while OUT is instantaneously shorted to GND. The second
scenario follows improper shutdown techniques in which
the SET pin is reset to GND quickly while OUT is held up
by a large output capacitance with light load. The Typical
Applications section shows simple, robust techniques for
shutting down SET and OUT together.
APPLICATIONS INFORMATION
+
SET
+
LT3082
10µA
IN
OUT
V
IN
V
OUT
3082 TA02
GAIN = 4
LT1991
4.7µF
150k
150k
450k
LTC2641
SPI
SET
+
LT3082
10µA
IN
OUT
V
IN
V
OUT
3082 TA03
R1
R2
VN2222LL
2.2µF
LT3082
15
3082f
TYPICAL APPLICATIONS
Using a Lower Value SET Resistor
Adding Soft-Start
Coincident Tracking
SET
+
LT3082
10µA
IN
OUT
1mA
V
IN
12V
C
OUT
4.7µF
V
OUT
0.5V TO 10V
3082 TA04
R1
49.9k
1%
R
SET
10k
R2
499
1%
C1
F
V
OUT
= 0.5V + 1mA • R
SET
SET
+
LT3082
10µA
IN
OUT
V
IN
4.8V to 40V
V
OUT
3.3V
0.2A
C
OUT
4.7µF
3082 TA05
R1
332k
C2
0.01µF
C1
F
D1
1N4148
+
LT3082
10µA
SET
+
LT3082
10µA
IN
OUT
SET
+
LT3082
10µA
IN
OUT
V
OUT3
5V
0.2A
C3
4.7µF
V
OUT2
3.3V
0.2A
3082 TA06
R2
80.6k
C2
4.7µF
C1
1.5µF
V
IN
7V TO 40V
R1
249k
V
OUT1
2.5V
0.2A
SET
IN
OUT
R3
169k
C4
4.7µF

LT3082EST#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
LDO Voltage Regulators 200mA Programmable 2-Terminal Current Source or Linear Regulator
Lifecycle:
New from this manufacturer.
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