REV. B
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
AD7722
16-Bit, 195 kSPS
CMOS, - ADC
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
FUNCTIONAL BLOCK DIAGRAM
AV
DD
DV
DD
REF1AGNDDGND
V
IN
(+)
V
IN
(–)
P/S
REF2
XTAL
CLKIN
UNI
DB15
DB14
CAL
RESET
SYNC
CS
DVAL/ RD
CFMT/DRDY
DB3/
TSI
DB4/
DOE
DB5/
SFMT
DB6/
FSI
DB7/
SCO
DB8/
SDO
16-BIT A/D CONVERTER
-
MODULATOR
FIR
FILTER
CLOCK
CIRCUITRY
CONTROL
LOGIC
DB13
AD7722
2.5V
REFERENCE
DB12
DB11
DB10
DB9/FSO
DB0
DB1
DB2
FEATURES
16-Bit - ADC
64 Oversampling Ratio
Up to 220 kSPS Output Word Rate
Low-Pass, Linear Phase Digital Filter
Inherently Monotonic
On-Chip 2.5 V Voltage Reference
Single-Supply 5 V
High Speed Parallel or Serial Interface
GENERAL DESCRIPTION
The AD7722 is a complete low power, 16-bit, Σ-∆ ADC. The
part operates from a 5 V supply and accepts a differential input
voltage range of 0 V to +2.5 V or ±1.25 V centered around a
common-mode bias. The AD7722 provides 16-bit performance
for input bandwidths up to 90.625 kHz. The part provides data
at an output word rate of 195.3 kHz.
The analog input is continuously sampled by an analog modula-
tor, eliminating the need for external sample-and-hold circuitry.
The modulator output is processed by two finite impulse response
(FIR) digital filters in series. The on-chip filtering reduces the
external antialias requirements to first order, in most cases. The
group delay for the filter is 215.5 µs, while the settling time for
a step input is 431 µs. The sample rate, filter corner frequency,
and output word rate are set by an external clock that is
nominally 12.5 MHz.
Use of a single bit DAC in the modulator guarantees excellent
linearity and dc accuracy. Endpoint accuracy is ensured on-chip
by calibration. This calibration procedure minimizes the zero-
scale and full-scale errors.
Conversion data is provided at the output register through a flex-
ible serial port or a parallel port. This offers 3-wire, high speed
interfacing to digital signal processors. The serial interface operates
in an internal clocking (master) mode, whereby an internal serial
data clock and framing pulse are device outputs. Additionally,
two AD7722s can be configured with the serial data outputs
connected together. Each converter alternately transmits its conver-
sion data on a shared serial data line.
The part provides an accurate on-chip 2.5 V reference. A
reference input/output function is provided to allow either the
internal reference or an external system reference to be used as
the reference source for the part.
The AD7722 is available in a 44-lead MQFP package and is
specified over the industrial temperature range of –40°C to +85°C.
