4
FN1547.9
Decemember 8, 2015
Operating Current (Note 5)
V
DD
= 5V, V
B
= 3V
Crystal Operation
I
D
I
B
-mA
32kHz - 0.025 0.015 - mA
1MHz - 0.08 0.15 - mA
2MHz - 0.15 0.25 - mA
4MHz - 0.3 0.4 - mA
Standby Current (Note 5)
V
B
= 2.2V
Crystal Operation
I
B
32kHz - 10 - µA
Input Capacitance C
IN
V
IN
= 0, T
A
= +25°C - - 2 pF
Maximum Rise and Fall Times
(Except XTAL Input and POR
Pin 10)
t
r
, t
f
-- 2µs
--µs
Input Voltage (Line Input Pin Only, Power Sense
Mode)
010 12V
V
SYS
> V
B
V
T
(For V
B
Not Internally Connected to V
DD
)
-1.0 -V
Power-On Reset (POR
) Pulse Width 100 75 - ns
NOTES:
4. Typical values are for T
A
= +25°C and nominal V
DD
.
5. Clock out (Pin 1) disabled, outputs open circuited. No serial access cycles.
Dynamic Electrical Specifications Bus Timing V
DD
±10%, V
SS
= 0V
DC
, T
A
= -40°C to +85°C
IDENTIFICATION
NUMBER PARAMETER SYMBOL
LIMITS (ALL TYPES)
UNITS
V
DD
= 3.3V V
DD
= 5V
MIN MAX MIN MAX
1 Chip Enable Setup Time t
EVCV
200 - 100 - ns
2 Chip Enable After Clock Hold Time t
CVEX
250 - 125 - ns
3 Clock Width High t
WH
400 - 200 - ns
4 Clock Width Low t
WL
400 - 200 - ns
5 Data In to Clock Setup Time t
DVCV
200 - 100 - ns
7 Clock to Data Propagation Delay t
CVDV
- 200 - 100 ns
8 Chip Disable to Output High Z t
EXQZ
- 200 - 100 ns
11 Output Rise Time t
r
- 200 - 100 ns
12 Output Fall Time t
f
- 200 - 100 ns
A Data in After Clock Hold Time t
CVDX
200 - 100 - ns
B Clock to Data Out Active t
CVQX
- 200 - 100 ns
C Clock Recovery Time t
REC
200 - 200 - ns
Static Electrical Specifications At T
A
= -40°C to +85°C, V
DD
= V
BATT
= 5V ±5%, Unless Otherwise Specified. (Continued)
PARAMETER SYMBOL TEST CONDITIONS
CDP68HC68T1
UNITSMIN
TYP
(Note 4) MAX
CDP68HC68T1
