IDT
TM
/ICS
TM
Low Skew Dual Bank DDR I/II Fan-out Buffer 1084C 12/03/09
ICS9P936
Low Skew Dual Bank DDR I/II Fan-out Buffer
2
Pin Description
PIN # PIN NAME PIN TYPE DESCRIPTION
1 AVDD2.5 PWR 2.5V Analog Power pin for Core PLL
2 AGND PWR Analog Ground pin for Core PLL
3 BUF_INT IN True Buffer In signal for memory outputs.
4 BUF_INC IN Complementary Buffer In signal for memory outputs.
5 DDRT0 OUT -40
6 DDRC0 OUT "Complementary" Clock of differential pair output.
7 DDRT1 OUT "True" Clock of differential pair output.
8 DDRC1 OUT "Complementary" Clock of differential pair output.
9 GND PWR Ground pin.
10 VDDQ2.5/1.8 PWR Power supply, nominal 2.5V or 1.8V for DDR or DDR 2 outputs respectively
11 FB_OUTT OUT
True single-ended feedback output, dedicated external feedback. It switches
at the same frequency as other DDR outputs.
12 FB_OUTC OUT
Complementary single-ended feedback output, dedicated external feedback.
It switches at the same frequency as other DDR outputs.
13 DDRT2 OUT "True" Clock of differential pair output.
14 DDRC2 OUT "Complementary" Clock of differential pair output.
15 SCLK IN Clock pin of SMBus circuitry, 5V tolerant.
16 SDATA I/O Data pin for SMBus circuitry, 3.3V tolerant.
17 DDRC3 OUT "Complementary" Clock of differential pair output.
18 DDRT3 OUT "True" Clock of differential pair output.
19 DDRC4 OUT "Complementary" Clock of differential pair output.
20 DDRT4 OUT "True" Clock of differential pair output.
21 VDDQ2.5/1.8 PWR Power supply, nominal 2.5V or 1.8V for DDR or DDR 2 outputs respectively
22 GND PWR Ground pin.
23 DDRC5 OUT "Complementary" Clock of differential pair output.
24 DDRT5 OUT "True" Clock of differential pair output.
25 AGND PWR Analog Ground pin for Core PLL
26 AVDD2.5 PWR 2.5V Analog Power pin for Core PLL
27 VDDQ2.5/1.8 PWR Power supply, nominal 2.5V or 1.8V for DDR or DDR 2 outputs respectively
28 GND PWR Ground pin.
