Atmel AT88SA10HS [DATASHEET] 4
8595H−CRYPTO−9/2012
1.4 Key Values
The values stored in the AT88SA10HS internal key array are hardwired into the masking layers of the chip during wafer
manufacture. All chips have the same keys stored internally, though the value of a particular key cannot be determined
externally from the chip. For this reason, customers should ensure they program a unique (and secret) number into the 64-
secret fuses and they should store the Atmel provided key values securely.
Individual key values are made available to qualified customers upon request to Atmel and are always transmitted in a secure
manner.
When the serial number is included in the MAC calculation, the response is considered to be diversified and the host needs to
know the base secret in order to be able to verify the authenticity of the client. A diversified response can also be obtained by
including the serial number in the computation of the value written to the secret fuses. The AT88SA10HS provides a secure
hardware mechanism to validate responses to determine if they are authentic.
1.5 SHA-256 Computation
AT88SA10HS performs only one cryptographic calculation – a keyed digest of an input challenge. It optionally includes various
other information stored on the chip within the digested message.
The AT88SA10HS computes the SHA-256 digest based on the algorithm documented here:
http://csrc.nist.gov/publications/fips/fips180-2/fips180-2.pdf
As a security measure, the 24-bit MfrID code (both ROM and Fuse bits) is automatically included in every message digested
by AT88SA10HS. The secret fuses are conditionally appended, depending on the parameters to the HOST command.
For complete sample calculations, see “Atmel AT88SA100S” and/or “Atmel AT88SA102S” datasheets.
1.6 Security Features
AT88SA10HS incorporates a number of physical security features designed to protect the keys from release. These include an
active shield over the entire surface of the part, internal memory encryption, internal clock generation, glitch protection, voltage
tamper detection, and other physical design features.
Pre-programmed keys stored on AT88SA10HS, are encrypted in such a way as to make retrieval of their values via outside
analysis very difficult.
Both the clock and logic supply voltage are internally generated, preventing any direct attack via the pins on these two signals.
2. IO Protocol
Communications to and from AT88SA10HS; take place over a single asynchronously timed wire using a pulse count scheme.
The overall communications structure is a hierarchy:
Table 2-1. IO Hierarchy
Tokens
Implement a single data bit transmitted on the bus, or the wake-up event.
Flags
Comprised of eight tokens (bits) which convey the direction and meaning of the next group of bits (if any),
which may be transmitted.
Blocks
Data following the command and Transmit flags. They incorporate both a byte count and a checksum to ensure
proper data transmission.
Packets
Bytes forming the core of the block without the count and CRC. They are either the input or output parameters
of an AT88SA10HS command or status information from AT88SA10HS.
See applications notes on the Atmel website for more details on how to use any microprocessor to easily generate the
signaling necessary to send these values to the chip.
