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AT88SA10HS-TSU-T

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24
Atmel AT88SA10HS [DATASHEET] 7
8595H−CRYPTO−9/2012
5. DC Parameters
Table 5-1. DC Parameters
Parameter Symbol Min Typ Max Unit Notes
Operating temperature T
A
-40 85 °C
Power supply voltage V
cc
2.7 5.25 V
Fuse burning voltage V
BURN
3.0 5.25 V Voltage applied to V
cc
pin. See Section 6.6.
Active power supply current I
CC
- 6 mA
Sleep power supply current @
-40° C to 55° C
I
SLEEP
150 nA When chip is in sleep mode, V
cc
= 5.25V,
Vsig = 0.0 to 0.3V or
Vsig = V
cc
-0.3V to V
cc
Sleep power supply current @
85° C
I
SLEEP
1
µA
When chip is in sleep mode, V
cc
= 5.25V,
Vsig = 0.0 to 0.3V or
Vsig = V
cc
-0.3V to V
cc
Input low voltage @
V
cc
= 5.25 V
V
IL
-0.5 0.75 V Voltage levels for Wake token when chip is in sleep
mode.
Input low voltage @
V
cc
= 2.7 V
V
IL
-0.5 0.5 V Voltage levels for Wake token when chip is in sleep
mode.
Input high voltage @
V
cc
= 5.25 V
V
IH
1.5 5.25 V Voltage levels for Wake token when chip is in sleep
mode.
Input high voltage @
V
cc
= 2.7 V
V
IH
1.25 3.0 V Voltage levels for Wake token when chip is in sleep
mode.
Input low voltage when active V
IL
-0.5 0.5 V When chip is in active mode,
V
cc
= 2.7 – 5.25V
Input high voltage when active V
IH
1.2 5.25 V When chip is in active mode,
V
cc
= 2.7 – 5.25V
Output low voltage V
OL
0.4 V When chip is in active mode,
V
cc
= 2.7 – 5.25V
Maximum input voltage V
MAX
5.25 V
ESD V
ESD
4 KV Human body model, Sig and V
cc
pins.
Atmel AT88SA10HS [DATASHEET] 8
8595H−CRYPTO−9/2012
5.1 IO Flags
The system is always the bus master, so before any IO transaction, the system must send an 8-bit flag
to the chip to indicate
the IO operation that is to be performed, as follows:
Name
Meaning
0x66 Command
After this flag, the system starts sending a command block to the chip. The first bit of the block
can follow immediately after the last bit of the flag
0x99 Transmit
After a turn-around delay, the chip will start transmitting the response for a previously transmitted
command block
0xCC Sleep
Upon receipt of a sleep flag, the chip will enter a low power mode until the next Wake token is
received
All other values are reserved and will be ignored.
Note: The values of flag for the AT88SA10HS host are different from that of the two clients, the AT88SA100S and
AT88SA102S. In this manner, both AT88SA102S (or AT88SA100S) and AT88SA10HS can share the same
communications pin on the system controller. While the AT88SA10HS will wake up when communications are
sent to the client, it will ignore all such transactions.
It is possible that data values transmitted to a client authentication chip (either the AT88SS100S or the AT88SA102S) could be
interpreted by the AT88SA10HS host chip as a legal transmit flag. In this case there could be a bus conflict as both the host
and client chips drive the signal wire at the same time. To prevent this, the PauseShort command should be used to prevent
the AT88SA10HS host chip from looking at the signal wire during any IO transaction to the client.
5.1.1 Command Timing
After a command flag is transmitted, a command block should be sent to the chip. During parsing of the parameters and
subsequent execution of a properly received command, the chip will be busy and not respond to transitions on the signal pin.
The delays for these operations are listed in the table below:
Table 5-2. Command Timing (Guaranteed by design; not tested)
Parameter Symbol Max Unit Notes
Parsing Delay
t
PARSE
100 μs Delay to check CRC and parse opcode and parameters before an
error indication will be available.
Host0Delay
t
EXEC_HOST0
13 ms Delay to execute any of the HOST0 command.
Host1Delay
t
EXEC_HOST1
7 ms Delay to execute any of the HOST1 command.
Host2Delay
t
EXEC_HOST2
0.5 ms Delay to execute any of the HOST2 command.
MemoryDelay
t
EXEC_READ
3 ms Delay to execute Read command.
SecureDelay
t
EXEC_SECURE
36 ms Max delay to execute BurnSecure command.
See Section 6.6 for more details.
PersonalizeDelay
t
PERSON
13 ms Delay to execute GenPersonalizationKey.
In this document, t
EXEC
is used as shorthand for the delay corresponding to whatever command has been sent to the chip.
Atmel AT88SA10HS [DATASHEET] 9
8595H−CRYPTO−9/2012
5.1.2 Transmit Flag
The Transmit flag is used to turn around the signal so that the AT88SA10HS can send data back to the system, depending on
its current state. The bytes that the AT88SA10HS returns to the system depend on its current state as follows:
Table 5-3. Return Codes
State Description Error/Status Description
After Wake, but prior to
first command
0x11 Indication that a proper Wake token has been received by AT88SA10HS.
After successful command
execution
– Return bytes per “Output Parameters” in Command section of this document.
In some cases this is a single byte with a value of 0x00 indicating success.
The Transmit flag can be re-sent to AT88SA10HS repeatedly if a re-read of
the output is necessary.
Execution error 0x0F Command was properly received but could not be executed by
AT88SA10HS. Changes in the AT88SA10HS state or the value of the
command bits must happen before it is re-attempted.
After CRC or other
communications error
0xFF
Command was not properly received by AT88SA10HS and should be
re-issued by the system. No attempt was made to execute the command.
The AT88SA10HS always transmits complete blocks to the system, so in the above table, the status/error bytes result in four
bytes going to the system – count, error, CRC x 2.
After receipt of a command block, the AT88SA10HS will parse the command for errors, a process which takes t
PARSE
(See
Section 5.1.1). After this interval the system can send a transmit token to the AT88SA10HS – if there was an error, the
AT88SA10HS will respond with an error code. If there is no error, the AT88SA10HS internally transitions automatically from
t
PARSE
to t
EXEC
and will not respond to any transmit tokens until both delays are complete.
5.1.3 Sleep Flag
The sleep flag is used to transition the AT88SA10HS to the low power state, which causes a complete reset of the internal
command engine of the AT88SA10HS and input/output buffer. It can be sent to AT88SA10HS at any time when AT88SA10HS
will accept a flag.
To achieve the specified I
SLEEP
, Atmel recommends that the input signal be brought below V
IL
when the chip is asleep. To
achieve I
SLEEP
if the sleep state of the input pin is high, the voltage on the input signal should be within 0.3V of V
CC
to avoid
additional leakage on the input circuit of the chip.
The system must calculate the total time required for all commands to be sent to the AT88SA10HS during a single session,
including any inter-bit/byte delays. If this total time exceeds t
WATCHDOG
then the system must issue a partial set of commands,
then a Sleep flag, then a Wake token, and finally after the Wake delay, issue the remaining commands.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24

AT88SA10HS-TSU-T

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Security ICs / Authentication ICs Host Auth. IC CryptoAuth SHA-256
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