AD9754
–18–
REV. A
APPLICATIONS
VDSL Applications Using the AD9754
Very High Frequency Digital Subscriber Line (VDSL) technol-
ogy is growing rapidly in applications requiring data transfer
over relatively short distances. By using QAM modulation and
transmitting the data in multiple discrete tones, high data rates
can be achieved.
As with other multitone applications, each VDSL tone is ca-
pable of transmitting a given number of bits, depending on the
signal to noise ratio (SNR) in a narrow band around that tone.
The tones are evenly spaced over the range of several kHz to
10 MHz. At the high frequency end of this range, performance
is generally limited by cable characteristics and environmental
factors, such as external interferers. Performance at the lower
frequencies is much more dependent on the performance of the
components in the signal chain. In addition to in-band noise,
intermodulation from other tones can also potentially interfere
with the recovery of data for a given tone. The two graphs in
Figure 35 represent a 500 tone missing bin test vector, with
frequencies evenly spaced from 400 Hz to 10 MHz. This test is
very commonly done to determine if distortion will limit the
number of bits which can transmitted in a tone. The test vector
has a series of missing tones around 750 kHz, which is represented
in Figure 35a, and a series of missing tones around 5 MHz,
which is represented in Figure 35b. In both cases, the spurious
free range between the transmitted tones and the empty bins is
greater than 60 dB.
FREQUENCY – Hz
AMPLITUDE – dBm
–30
–50
–110
–70
–90
600k 800k 1.0M
–40
–60
–80
–100
Figure 35a. Notch in missing bin at 750 kHz is down
>60 dB. Peak amplitude = 0 dBm.
FREQUENCY – MHz
AMPLITUDE – dBm
–30
–50
–110
–70
–90
4.8 5.0 5.2
–40
–60
–80
–100
Figure 35b. Notch in missing bin at 5 MHz is down
>60 dB. Peak amplitude = 0 dBm.
CDMA
Carrier Division Multiple Access, or CDMA, is an air transmit/
receive scheme where the signal in the transmit path is modu-
lated with a pseudorandom digital code (sometimes referred to
as the spreading code). The effect of this is to spread the trans-
mitted signal across a wide spectrum. Similar to a DMT wave-
form, a CDMA waveform containing multiple subscribers can
be characterized as having a high peak to average ratio (i.e.,
crest factor), thus demanding highly linear components in the
transmit signal path. The bandwidth of the spectrum is defined
by the CDMA standard being used, and in operation is imple-
mented by using a spreading code with particular characteristics.
Distortion in the transmit path can lead to power being trans-
mitted out of the defined band. The ratio of power transmitted
in-band to out-of-band is often referred to as Adjacent Channel
Power (ACP). This is a regulatory issue due to the possibility of
interference with other signals being transmitted by air. Regula-
tory bodies define a spectral mask outside of the transmit band,
and the ACP must fall under this mask. If distortion in the
transmit path cause the ACP to be above the spectral mask,
then filtering, or different component selection is needed to
meet the mask requirements.
Figure 36 shows an example of the AD9754 used in a W-CDMA
transmitter application using the AD6122 CDMA 3 V transmit-
ter IF subsystem. The AD6122 has functions, such as external
gain control and low distortion characteristics, needed for the
superior Adjacent Channel Power (ACP) requirements of
WCDMA.
AD9754
–19–
REV. A
Figure 37 shows the AD9754 reconstructing a wideband, or
W-CDMA test vector with a bandwidth of 5 MHz, centered at
15.625 MHz and being sampled at 62.5 MSPS. ACP for the
given test vector is measured at 70 dB.
FREQUENCY – MHz
REFERENCE LEVEL – dBm
–30
–50
–110
–70
–90
13.125 15.625 18.125
–40
–60
–80
–100
–20
–120
Figure 37. CDMA Signal, Sampled at 65 MSPS, Adjacent
Channel Power >70 dB
AD9754 EVALUATION BOARD
General Description
The AD9754-EB is an evaluation board for the AD9754 14-bit
DAC converter. Careful attention to layout and circuit design,
combined with a prototyping area, allows the user to easily and
effectively evaluate the AD9754 in any application where high
resolution, high speed conversion is required.
This board allows the user the flexibility to operate the AD9754
in various configurations. Possible output configurations in-
clude transformer coupled, resistor terminated, inverting/
noninverting and differential amplifier outputs. The digital inputs
are designed to be driven directly from various word generators
with the onboard option to add a resistor network for proper
load termination. Provisions are also made to operate the
AD9754 with either the internal or external reference or to
exercise the power-down feature.
Refer to the application note AN-420 for a thorough description
and operating instructions for the AD9754 evaluation board.
AD9754
(“I DAC”)
AD9754
(“Q DAC”)
IOUTA
IOUTB
QOUTA
QOUTB
DCOM
FSADJREFIO SLEEP
R
SET2
1.9kV
0.1mF
CLK
Q DATA
INPUT
I DATA
INPUT
DVDD
AVDD
100W
500V
100V
C
FILTER
100V
500V
500V
500V
500V
500V
500V
634V
+3V
IIPP
IIPN
IIQP
IIQN
AD6122
REFLO
ACOM
REFLOAVDD
REFIO
FSADJ
R
SET1
2kV
R
CAL
220V
U1
U2
AVDD
LATCHES
500V
DAC
DAC
LATCHES
100V
42
TEMPERATURE
COMPENSATION
GAIN
CONTROL
SCALE
FACTOR
REFIN
VGAIN
GAIN
CONTROL
LOIPP
LOIPN
TXOPP
TXOPN
V
CC
V
CC
PHASE
SPLITTER
MODOPP
MODOPN
Figure 36. CDMA Transmit Application Using AD9754
AD9754
–20–
REV. A
Figure 38. Evaluation Board Schematic
1098765432
1
R4
1098765432
1
R7
DVDD
1098765432
1
R3
1098765432
1
DVDD
R6
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
P1
1098765432
1
R5
DVDD
1098765432
1
R1
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
C19
C1
C2
C25
C26
C27
C28
C29
16 PINDIP
RES PK
16
15
14
13
12
11
10
1
2
3
4
5
6
7
C30
C31
C32
C33
C34
C35
C36
16 PINDIP
RES PK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
CLOCK
DVDD
DCOM
NC
AVDD
ICOMP
IOUTA
IOUTB
ACOM
NC
FS ADJ
REFIO
REFLO
SLEEP
U1
AD975x
AVDD
CT1
A
1
A
R15
49.9V
CLK
JP1
A
B
32
1
J1
TP1
EXTCLK
C7
1mF
C8
0.1mF
AVDD
A
C9
0.1mF
TP8
2
AVDD
TP11
C11
0.1mF
TP10 TP9
R16
2kV
TP14
JP4
C10
0.1mF
OUT 1
OUT 2
TP13
R17
49.9V
PDIN
J2
A A
A
AVDD
3
JP2
TP12
TP7
A
C6
10mF
AVCC
B6
TP6
A
C5
10mF
AVEE
B5
TP19
A
AGND
B4
TP18
TP5
C4
10mF
TP4
AVDD
B3
TP2
DGND
B2
C3
10mF
TP3
DVDD
B1
R20
49.9V
J3
C12
22pF
A A
R14
0
A
4
5
6
1
3
T1
J7
R38
49.9V
J4
A A
JP6A
JP6B
A
R13
OPEN
C13
22pF
C20
0
R12
OPEN
A
B
A
JP7B
B
A
JP7A
R10
1kV
B
A
JP8
R9
1kV
A
B
A
R35
1kV
JP9
R18
1kV
A
3
7
6
2
4
AD8047
C21
0.1mF
A
C22
1mF
R36
1kV
C23
0.1mF
A
C24
1mF
AVEE
AVCC
R37
49.9V
J6
A
3
7
6
2
4
123
JP5
C15
0.1mF
A
AVEE
R46
1kV
C17
0.1mF
A
1
2
3
JP3
A
B
AVCC
A
CW
R43
5kV
R45
1kV
C14
1mF
A
R44
50V
EXTREFIN
J5
A
R42
1kV
C16
1mF
A
AVCC
C18
0.1mF
U7
6
2
4
A
VIN
VOUT
GND
REF43
98765432
1
R2
10
A
1098765432
1
DVDD
R8
U6
A
AD8047
OUT2
OUT1
U4

AD9754AR

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC 14-Bit 100 MSPS
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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