AD9754
–6–
REV. A
DEFINITIONS OF SPECIFICATIONS
Linearity Error (Also Called Integral Nonlinearity or INL)
Linearity error is defined as the maximum deviation of the
actual analog output from the ideal output, determined by a
straight line drawn from zero to full scale.
Differential Nonlinearity (or DNL)
DNL is the measure of the variation in analog value, normalized
to full scale, associated with a 1 LSB change in digital input
code.
Offset Error
The deviation of the output current from the ideal of zero is
called offset error. For IOUTA, 0 mA output is expected when
the inputs are all 0s. For IOUTB, 0 mA output is expected
when all inputs are set to 1s.
Gain Error
The difference between the actual and ideal output span. The
actual span is determined by the output when all inputs are set
to 1s minus the output when all inputs are set to 0s.
Output Compliance Range
The range of allowable voltage at the output of a current-output
DAC. Operation beyond the maximum compliance limits may
cause either output stage saturation or breakdown, resulting in
nonlinear performance.
Temperature Drift
Temperature drift is specified as the maximum change from the
ambient (+25°C) value to the value at either T
MIN
or T
MAX
. For
offset and gain drift, the drift is reported in ppm of full-scale
range (FSR) per °C. For reference drift, the drift is reported
in ppm per °C.
Power Supply Rejection
The maximum change in the full-scale output as the supplies
are varied over a specified range.
Settling Time
The time required for the output to reach and remain within a
specified error band about its final value, measured from the
start of the output transition.
Glitch Impulse
Asymmetrical switching times in a DAC give rise to undesired
output transients that are quantified by a glitch impulse. It is
specified as the net area of the glitch in pV-s.
Spurious-Free Dynamic Range
The difference, in dB, between the rms amplitude of the output
signal and the peak spurious signal over the specified bandwidth.
Total Harmonic Distortion
THD is the ratio of the sum of the rms value of the first six
harmonic components to the rms value of the measured output
signal. It is expressed as a percentage or in decibels (dB).
Multitone Power Ratio
The spurious-free dynamic range for an output containing mul-
tiple carrier tones of equal amplitude. It is measured as the
difference between the rms amplitude of a carrier tone to the
peak spurious signal in the region of a removed tone.
150pF
+1.20V REF
AVDD ACOM
REFLO
ICOMP
PMOS
CURRENT SOURCE
ARRAY
SEGMENTED SWITCHES
FOR DB13–DB5
LSB
SWITCHES
REFIO
FS ADJ
DVDD
DCOM
CLOCK
+5V
R
SET
2kV
0.1mF
DVDD
DCOM
IOUTA
IOUTB
0.1mF
AD9754
SLEEP
50V
RETIMED
CLOCK
OUTPUT*
LATCHES
DIGITAL
DATA
TEKTRONIX AWG-2021
w/OPTION 4
LECROY 9210
PULSE GENERATOR
CLOCK
OUTPUT
50V
20pF
50V
20pF
100V
TO HP3589A
SPECTRUM/
NETWORK
ANALYZER
50V INPUT
MINI-CIRCUITS
T1-1T
* AWG2021 CLOCK RETIMED
SUCH THAT DIGITAL DATA
TRANSITIONS ON FALLING EDGE
OF 50% DUTY CYCLE CLOCK.
+5V
Figure 2. Basic AC Characterization Test Setup
AD9754
–7–
REV. A
Typical AC Characterization Curves
(AVDD = +5 V, DVDD = +3 V, I
OUTFS
= 20 mA, 50 Doubly Terminated Load, Differential Output, T
A
= +25C, SFDR up to Nyquist, unless
otherwise noted)
f
OUT
– MHz
SFDR – dB
90
80
40
0.1 100110
60
70
5MSPS
25MSPS
65MSPS
50MSPS
125MSPS
50
Figure 3. SFDR vs. f
OUT
@ 0 dBFS
f
OUT
– MHz
SFDR – dBc
90
40
05 30
10 15 20
80
70
60
0dBFS
–6dBFS
–12dBFS
25
50
Figure 6. SFDR vs. f
OUT
@ 65 MSPS
A
OUT
– dBFS
SFDR – dB
90
40
85
75
80
70
65
55
60
50
45
–30 –25 0
–20 –15 –10 –5
455kHz
@5MSPS
2.27MHz
@25MSPS
59.1MHz
@65MSPS
11.37MHz
@125MSPS
Figure 9. Single-Tone SFDR vs. A
OUT
@ f
OUT
= f
CLOCK
/11
FREQUENCY – MHz
SFDR – dB
85
40
0.0 2.00.4 0.8 1.2 1.6
80
75
70
60
55
65
0dBFS
–6dBFS
–12dBFS
50
45
90
Figure 4. SFDR vs. f
OUT
@ 5 MSPS
f
OUT
– MHz
SFDR – dBc
90
40
010 50
20 30 40
80
70
60
0dBFS
–6dBFS
–12dBFS
50
60
Figure 7. SFDR vs. f
OUT
@125 MSPS
A
OUT
– dBFS
SFDR – dB
100
40
90
70
80
50
60
–30 –25 0
–20 –15 –10 –5
1MHz
@5MSPS
5MHz
@25MSPS
25MHz
@125MSPS
13MHz
@65MSPS
Figure 10. Single-Tone SFDR vs.
A
OUT
@ f
OUT
= f
CLOCK
/5
Figure 5. SFDR vs. f
OUT
@ 25 MSPS
80
10mA FS
f
OUT
– MHz
SFDR – dBc
90
40
0
212
46810
60
50
70
20mA FS
5mA FS
Figure 8. SFDR vs. f
OUT
and
I
OUTFS
@ 25 MSPS and 0 dBFS
f
CLOCK
– MSPS
SNR– dB
85
60
0 40 14060 80 100 120
80
70
75
65
20
20mA FS
5mA FS
10mA FS
Figure 11. SNR vs. f
CLOCK
and I
OUTFS
@ f
OUT
= 2 MHz and 0 dBFS
AD9754
–8–
REV. A
–0.5
–2.0
16k
ERROR – LSB
4k 8k 12k
1.0
0
–1.5
0.5
–1.0
CODE
0
Figure 12. Typical INL
–0.5
16k
ERROR – LSB
4k 8k 12k
1.0
0
0.5
–1.0
CODE
0
Figure 13. Typical DNL
SINGLE AMPLITUDE – dBm
0
–100
030
FREQUENCY – MHz
f
CLOCK
= 65MSPS
f
OUT1
= 6.25MHz
f
OUT2
= 6.75MHz
f
OUT3
= 7.25MHz
f
OUT4
= 7.75MHz
SFDR > 70dBc
AMPLITUDE = 0dBFS
–90
–80
–70
–60
–50
–40
–30
–20
–10
252015105
Figure 15. Four-Tone SFDR
TEMPERATURE – C
SFDR – dBc
90
80
50
–55 –5 95
70
60
f
OUT
= 29MHz
f
OUT
= 4MHz
f
OUT
= 40MHz
f
OUT
= 10MHz
45
Figure 14. SFDR vs. Temperature @
125 MSPS, 0 dBFS

AD9754AR

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC 14-Bit 100 MSPS
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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