P89LPC9401_1 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet Rev. 01 — 5 September 2005 40 of 59
Philips Semiconductors
P89LPC9401
8-bit two-clock 80C51 microcontroller with 32 segment × 4 LCD driver
7.26.15 I
2
C-bus slave addresses
The I
2
C-bus slave address is 0111 0000. The LCD controller is a write-only device and will
not respond to a read access.
7.27 Flash program memory
7.27.1 General description
The P89LPC9401 flash memory provides in-circuit electrical erasure and programming.
The flash can be erased, read, and written as bytes. The Sector and Page Erase functions
can erase any flash sector (1 kB) or page (64 bytes). The Chip Erase operation will erase
the entire program memory. ICP using standard commercial programmers is available. In
addition, IAP and byte-erase allows code memory to be used for non-volatile data storage.
On-chip erase and write timing generation contribute to a user-friendly programming
interface. The P89LPC9401 flash reliably stores memory contents even after
100,000 erase and program cycles. The cell is designed to optimize the erase and
programming mechanisms. The P89LPC9401 uses V
DD
as the supply voltage to perform
the Program/Erase algorithms.
7.27.2 Features
Programming and erase over the full operating voltage range.
Byte erase allows code memory to be used for data storage.
Read/Programming/Erase using ISP/IAP/ICP.
Internal fixed boot ROM, containing low-level IAP routines available to user code.
Default loader providing ISP via the serial port, located in upper end of user program
memory.
Boot vector allows user-provided flash loader code to reside anywhere in the flash
memory space, providing flexibility to the user.
Any flash program or erase operation in 2 ms.
Programming with industry-standard commercial programmers.
Programmable security for the code in the flash for each sector.
100,000 typical erase/program cycles for each byte.
10 year minimum data retention.
7.27.3 Flash organization
The program memory consists of eight 1 kB sectors on the P89LPC9401 device. Each
sector can be further divided into 64-byte pages. In addition to sector erase, page erase,
and byte erase, a 64-byte page register is included which allows from 1 byte to 64 bytes of
a given page to be programmed at the same time, substantially reducing overall
programming time.
7.27.4 Using flash as data storage
The flash code memory array of this device supports individual byte erasing and
programming. Any byte in the code memory array may be read using the MOVC
instruction, provided that the sector containing the byte has not been secured (a MOVC
instruction is not allowed to read code memory contents of a secured sector). Thus any
byte in a non-secured sector may be used for non-volatile data storage.
P89LPC9401_1 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet Rev. 01 — 5 September 2005 41 of 59
Philips Semiconductors
P89LPC9401
8-bit two-clock 80C51 microcontroller with 32 segment × 4 LCD driver
7.27.5 Flash programming and erasing
Four different methods of erasing or programming of the flash are available. The flash may
be programmed or erased in the end-user application (IAP) under control of the
application’s firmware. Another option is to use the ICP mechanism. This ICP system
provides for programming through a serial clock - serial data interface. As shipped from
the factory, the upper 512 bytes of user code space contains a serial ISP routine allowing
for the device to be programmed in circuit through the serial port. The flash may also be
programmed or erased using a commercially available EPROM programmer which
supports this device. This device does not provide for direct verification of code memory
contents. Instead, this device provides a 32-bit CRC result on either a sector or the entire
user code space.
7.27.6 In-circuit programming
ICP is performed without removing the microcontroller from the system. The ICP facility
consists of internal hardware resources to facilitate remote programming of the
P89LPC9401 through a two-wire serial interface. The Philips ICP facility has made ICP in
an embedded application—using commercially available programmers—possible with a
minimum of additional expense in components and circuit board area. The ICP function
uses five pins. Only a small connector needs to be available to interface your application
to a commercial programmer in order to use this feature. Additional details may be found
in the
P89LPC9401 User manual
.
7.27.7 In-application programming
IAP is performed in the application under the control of the microcontroller’s firmware. The
IAP facility consists of internal hardware resources to facilitate programming and erasing.
The Philips IAP has made IAP in an embedded application possible without additional
components. Two methods are available to accomplish IAP. A set of predefined IAP
functions are provided in a Boot ROM and can be called through a common interface,
PGM_MTP. Several IAP calls are available for use by an application program to permit
selective erasing and programming of flash sectors, pages, security bits, configuration
bytes, and device ID. These functions are selected by setting up the microcontroller’s
registers before making a call to PGM_MTP at FF03H. The Boot ROM occupies the
program memory space at the top of the address space from FF00 to FEFFH, thereby not
conflicting with the user program memory space.
In addition, IAP operations can be accomplished through the use of four SFRs consisting
of a control/status register, a data register, and two address registers. Additional details
may be found in the
P89LPC9401 User manual
.
7.27.8 In-system programming
ISP is performed without removing the microcontroller from the system. The ISP facility
consists of a series of internal hardware resources coupled with internal firmware to
facilitate remote programming of the P89LPC9401 through the serial port. This firmware is
provided by Philips and embedded within each P89LPC9401 device. The Philips ISP
facility has made ISP in an embedded application possible with a minimum of additional
expense in components and circuit board area. The ISP function uses five pins (V
DD
,V
SS
,
TXD, RXD, and RST). Only a small connector needs to be available to interface your
application to an external circuit in order to use this feature.
P89LPC9401_1 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet Rev. 01 — 5 September 2005 42 of 59
Philips Semiconductors
P89LPC9401
8-bit two-clock 80C51 microcontroller with 32 segment × 4 LCD driver
7.27.9 Power-on reset code execution
The P89LPC9401 contains two special flash elements: the Boot Vector and the Boot
Status Bit. Following reset, the P89LPC9401 examines the contents of the Boot Status
Bit. If the Boot Status Bit is set to zero, power-up execution starts at location 0000H, which
is the normal start address of the user’s application code. When the Boot Status Bit is set
to a value other than zero, the contents of the Boot Vector are used as the high byte of the
execution address and the low byte is set to 00H.
Table 9 shows the factory default Boot Vector settings for these devices. Note: These
settings are different than the original P89LPC932. Tools designed to support the
P89LPC9401 should be used to program this device, such as Flash Magic version
1.98, or later. A factory-provided boot loader is preprogrammed into the address space
indicated and uses the indicated boot loader entry point to perform ISP functions. This
code can be erased by the user. Users who wish to use this loader should take
precautions to avoid erasing the 1 kB sector that contains this boot loader. Instead,
the page erase function can be used to erase the first eight 64-byte pages located in
this sector. A custom boot loader can be written with the Boot Vector set to the custom
boot loader, if desired.
7.27.10 Hardware activation of the boot loader
The boot loader can also be executed by forcing the device into ISP mode during a
power-on sequence (see the
P89LPC9401 User manual
for specific information). This has
the same effect as having a non-zero status byte. This allows an application to be built that
will normally execute user code but can be manually forced into ISP operation. If the
factory default setting for the Boot Vector (1FH) is changed, it will no longer point to the
factory preprogrammed ISP boot loader code. After programming the flash, the status
byte should be programmed to zero in order to allow execution of the user’s application
code beginning at address 0000H.
7.28 User configuration bytes
Some user-configurable features of the P89LPC9401 must be defined at power-up and
therefore cannot be set by the program after start of execution. These features are
configured through the use of the flash byte UCFG1. Please see the
P89LPC9401 User
manual
for additional details.
7.29 User sector security bytes
There are eight User Sector Security Bytes on the P89LPC9401 device. Each byte
corresponds to one sector. Please see the
P89LPC9401 User manual
for additional
details.
Table 9: Default Boot Vector values and ISP entry points
Device Default
Boot Vector
Default
boot loader
entry point
Defaultboot loader
code range
1 kB sector
range
P89LPC9401 1FH 1F00H 1E00H to 1FFFH 1C00H to 1FFFH

P89LPC9401FBD,551

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC MCU 8BIT 8KB FLASH 64LQFP
Lifecycle:
New from this manufacturer.
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