LT3957
19
3957f
APPLICATIONS INFORMATION
SEPIC CONVERTER APPLICATIONS
The LT3957 can be confi gured as a SEPIC (single-ended
primary inductance converter), as shown in Figure 1. This
topology allows for the input to be higher, equal, or lower
than the desired output voltage. The conversion ratio as
a function of duty cycle is:
V
OUT
+ V
D
V
IN
=
D
1D
in continuous conduction mode (CCM).
In a SEPIC converter, no DC path exists between the input
and output. This is an advantage over the boost converter
for applications requiring the output to be disconnected
from the input source when the circuit is in shutdown.
Compared to the fl yback converter, the SEPIC converter
has the advantage that both the power MOSFET and the
output diode voltages are clamped by the capacitors (C
IN
,
C
DC
and C
OUT
), therefore, there is less voltage ringing
across the power MOSFET and the output diodes. The
SEPIC converter requires much smaller input capacitors
than those of the fl yback converter. This is due to the fact
that, in the SEPIC converter, the current through inductor
L1 (which is series with the input) is continuous.
SEPIC Converter: Switch Duty Cycle and Frequency
For a SEPIC converter operating in CCM, the duty cycle
of the main switch can be calculated based on the output
voltage (V
OUT
), the input voltage (V
IN
) and the diode
forward voltage (V
D
).
The maximum duty cycle (D
MAX
) occurs when the converter
has the minimum input voltage:
D
MAX
=
V
OUT
+ V
D
V
IN(MIN)
+ V
OUT
+ V
D
SEPIC Converter: The Maximum Output Current
Capability and Inductor Selection
As shown in Figure 1, the SEPIC converter contains two
inductors: L1 and L2. L1 and L2 can be independent, but
can also be wound on the same core, since identical volt-
ages are applied to L1 and L2 throughout the switching
cycle.
For the SEPIC topology, the current through L1 is the
converter input current. Based on the fact that, ideally, the
output power is equal to the input power, the maximum
average inductor currents of L1 and L2 are:
I
L1(MAX)
=I
IN(MAX)
=I
O(MAX)
D
MAX
1D
MAX
I
L2(MAX)
=I
O(MAX)
Due to the current limit of its internal power switch,
the LT3957 should be used in a SEPIC converter whose
maximum output current (I
O(MAX)
) is less than the output
current capability by a suffi cient margin (10% or higher
is recommended):
I
O(MAX)
< 1D
MAX
(
)
•5A 0.5 ΔI
SW
(
)
The inductor ripple currents ΔI
L1
and ΔI
L2
are identical:
ΔI
L1
= ΔI
L2
= 0.5 • ΔI
SW
The inductor ripple current ΔI
SW
has a direct effect on the
choice of the inductor value and the converters maximum
output current capability. Choosing smaller values of ΔI
SW
requires large inductances and reduces the current loop
gain (the converter will approach voltage mode). Accepting
larger values of ΔI
SW
allows the use of low inductances,
but results in higher input current ripple and greater core
losses and reduces output current capability.
Given an operating input voltage range, and having chosen
the operating frequency and ripple current in the induc-
tor, the inductor value (L1 and L2 are independent) of the
SEPIC converter can be determined using the following
equation:
L1 = L2 =
V
IN(MIN)
0.5 ΔI
SW
•ƒ
•D
MAX
For most SEPIC applications, the equal inductor values
will fall in the range of 1µH to 100µH.
LT3957
20
3957f
APPLICATIONS INFORMATION
By making L1 = L2, and winding them on the same core, the
value of inductance in the preceding equation is replaced
by 2L, due to mutual inductance:
L =
V
IN(MIN)
ΔI
SW
•ƒ
•D
MAX
This maintains the same ripple current and energy storage
in the inductors. The peak inductor currents are:
I
L1(PEAK)
= I
L1(MAX)
+ 0.5 • ΔI
L1
I
L2(PEAK)
= I
L2(MAX)
+ 0.5 • ΔI
L2
The maximum RMS inductor currents are approximately
equal to the maximum average inductor currents.
Based on the preceding equations, the user should choose
the inductors having suffi cient saturation and RMS cur-
rent ratings.
SEPIC Converter: Output Diode Selection
To maximize effi ciency, a fast switching diode with a low
forward drop and low reverse leakage is desirable. The
average forward current in normal operation is equal to
the output current.
It is recommended that the peak repetitive reverse voltage
rating V
RRM
is higher than V
OUT
+ V
IN(MAX)
by a safety
margin (a 10V safety margin is usually suffi cient).
The power dissipated by the diode is:
P
D
= I
O(MAX)
• V
D
where V
D
is diode’s forward voltage drop, and the diode
junction temperature is:
T
J
= T
A
+ P
D
• R
θJA
The R
θJA
used in this equation normally includes the R
θJC
for the device, plus the thermal resistance from the board,
to the ambient temperature in the enclosure. T
J
must not
exceed the diode maximum junction temperature rating.
SEPIC Converter: Output and Input Capacitor Selection
The selections of the output and input capacitors of the
SEPIC converter are similar to those of the boost converter.
Please refer to the Boost Converter: Output Capacitor
Selection and Boost Converter: Input Capacitor Selection
sections.
SEPIC Converter: Selecting the DC Coupling Capacitor
The DC voltage rating of the DC coupling capacitor (C
DC
,
as shown in Figure 1) should be larger than the maximum
input voltage:
V
CDC
> V
IN(MAX)
C
DC
has nearly a rectangular current waveform. During
the switch off-time, the current through C
DC
is I
IN
, while
approximately –I
O
ows during the on-time. The RMS
rating of the coupling capacitor is determined by the fol-
lowing equation:
I
RMS(CDC)
>I
O(MAX)
V
OUT
+ V
D
V
IN(MIN)
A low ESR and ESL, X5R or X7R ceramic capacitor works
well for C
DC
.
INVERTING CONVERTER APPLICATIONS
The LT3957 can be confi gured as a dual-inductor inverting
topology, as shown in Figure 8. The V
OUT
to V
IN
ratio is:
V
OUT
V
D
V
IN
=−
D
1D
in continuous conduction mode (CCM).
Figure 8. A Simplifi ed Inverting Converter
C
DC
V
IN
C
IN
L1
D1
C
OUT
V
OUT
3757 F10
+
GND
LT3957
SW
L2
+
+
+
LT3957
21
3957f
APPLICATIONS INFORMATION
Inverting Converter: Switch Duty Cycle and Frequency
For an inverting converter operating in CCM, the duty cycle
of the main switch can be calculated based on the negative
output voltage (V
OUT
) and the input voltage (V
IN
).
The maximum duty cycle (D
MAX
) occurs when the converter
has the minimum input voltage:
D
MAX
=
V
OUT
V
D
V
OUT
V
D
V
IN(MIN)
Inverting Converter: Output Diode and Input Capacitor
Selections
The selections of the inductor, output diode and input
capacitor of an inverting converter are similar to those
of the SEPIC converter. Please refer to the corresponding
SEPIC converter sections.
Inverting Converter: Output Capacitor Selection
The inverting converter requires much smaller output
capacitors than those of the boost, fl yback and SEPIC
converters for similar output ripples. This is due to the fact
that, in the inverting converter, the inductor L2 is in series
with the output, and the ripple current fl owing through the
output capacitors are continuous. The output ripple voltage
is produced by the ripple current of L2 fl owing through the
ESR and bulk capacitance of the output capacitor:
ΔV
OUT(PP)
I
L2
•ESR
COUT
+
1
8•ƒ•C
OUT
After specifying the maximum output ripple, the user can
select the output capacitors according to the preceding
equation.
The ESR can be minimized by using high quality X5R or
X7R dielectric ceramic capacitors. In many applications,
ceramic capacitors are suffi cient to limit the output volt-
age ripple.
The RMS ripple current rating of the output capacitor
needs to be greater than:
I
RMS(COUT)
> 0.3 • ΔI
L2
Inverting Converter: Selecting the DC Coupling Capacitor
The DC voltage rating of the DC coupling capacitor
(C
DC
, as shown in Figure 10) should be larger than the
maximum input voltage minus the output voltage (nega-
tive voltage):
V
CDC
> V
IN(MAX)
– V
OUT
C
DC
has nearly a rectangular current waveform. During
the switch off-time, the current through C
DC
is I
IN
, while
approximately –I
O
ows during the on-time. The RMS
rating of the coupling capacitor is determined by the fol-
lowing equation:
I
RMS(CDC)
>I
O(MAX)
D
MAX
1D
MAX
A low ESR and ESL, X5R or X7R ceramic capacitor works
well for C
DC
.
Board Layout
The high power and high speed operation of the LT3957
demands careful attention to board layout and component
placement. Careful attention must be paid to the internal
power dissipation of the LT3957 at high input voltages,
high switching frequencies, and high internal power switch
currents to ensure that a junction temperature of 125°C is
not exceeded. This is especially important when operating
at high ambient temperatures. Exposed pads on the bot-
tom of the package are SGND and SW terminals of the IC,
and must be soldered to a SGND ground plane and a SW
plane respectively. It is recommended that multiple vias
in the printed circuit board be used to conduct heat away
from the IC and into the copper planes with as much as
area as possible.
To prevent radiation and high frequency resonance
problems, proper layout of the components connected
to the IC is essential, especially the power paths with
higher di/dt. The following high di/dt loops of different
topologies should be kept as tight as possible to reduce
inductive ringing:
In boost confi guration, the high di/dt loop contains the
output capacitor, the internal power MOSFET and the
Schottky diode.

LT3957EUHE#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators High Input Voltage, Boost, flyback, SEPIC and Inverting Converter
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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