NB3H60113G
www.onsemi.com
7
Table 5. ATTRIBUTES
Characteristic Value
ESD Protection Human Body Model 2 kV
Internal Input Default State Pull up/ down Resistor
50 kW
Moisture Sensitivity, Indefinite Time Out of Dry Pack (Note 1) MSL1
Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in
Transistor Count 130 k
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 6. ABSOLUTE MAXIMUM RATING (Note 2)
Symbol Parameter Rating Unit
VDD Positive power supply with respect to Ground −0.5 to +4.6 V
V
I
Input Voltage with respect to chip ground −0.5 to VDD + 0.5 V
T
A
Operating Ambient Temperature Range (Industrial Grade) −40 to +85 °C
T
STG
Storage temperature −65 to +150 °C
T
SOL
Max. Soldering Temperature (10 sec) 265 °C
q
JA
Thermal Resistance (Junction−to−ambient) 0 lfpm
(Note 3) 500 lfpm
129
84
°C/W
°C/W
q
JC
Thermal Resistance (Junction−to−case) 35 to 40 °C/W
T
J
Junction temperature 125 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
2. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and not valid simultaneously. If
stress limits are exceeded device functional operation is not implied, damage may occur and reliability may be affected.
3. JEDEC standard multilayer board − 2S2P (2 signal, 2 power). ESD51.7 type board. Back side Copper heat spreader area 100 sq mm, 2 oz
(0.070 mm) copper thickness.
Table 7. RECOMMENDED OPERATION CONDITIONS
Symbol Parameter Condition Min Typ Max Unit
V
DD
Core Power Supply Voltage 3.3 V operation
2.5 V operation
2.97
2.25
3.3
2.5
3.63
2.75
V
CL Clock output load capacitance for
LVCMOS/ LVTTL clock
f
out
< 100 MHz
f
out
≥ 100 MHz
15
5
pF
pF
fclkin Crystal Input Frequency
Reference Clock Frequency
Fundamental Crystal
Single ended clock Input
3
3
50
200
MHz
C
X
XIN / XOUT pin stray Capacitance Note 4 4.5 pF
C
XL
Crystal Load Capacitance 10 pF
ESR Crystal ESR 150
W
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
4. The XIN / XOUT pin stray capacitance needs to be subtracted from crystal load capacitance (along with PCB and trace capacitance) while
selecting appropriate load for the crystal in order to get minimum ppm error.
