IDT82V3911 SHORT FORM DATASHEET SYNCHRONOUS ETHERNET TWO-CHANNEL PLL FOR 10GBE AND 40GBE
Recommendations for Unused Input and Output Pins 10 July 1, 2013
2.1 RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
2.1.1 INPUTS
Control Pins
All control pins have internal pull-ups or pull-downs; additional resis-
tance is not required but can be added for additional protection. A 1k
Ω
resistor can be used.
Single-Ended Clock Inputs
For protection, unused single-ended clock inputs should be tied to
ground.
Differential Clock Inputs
For applications not requiring the use of a differential input, both
*_POS and *_NEG can be left floating. Though not required, but for
additional protection, a 1k
Ω resistor can be tied from _POS to ground.
XTAL Inputs
For applications not requiring the use of a crystal oscillator input,
both _IN and _OUT can be left floating. Though not required, but for
additional protection, a 1k
Ω resistor can be tied from _IN to ground.
2.1.2 OUTPUTS
Status Pins
For applications not requiring the use of a status pin, we recommend
bringing out to a test point for debugging purposes.
Single-Ended Clock Outputs
All unused single-ended clock outputs can be left floating, or can be
brought out to a test point for debugging purposes.
Differential Clock Outputs
All unused differential outputs can be left floating. We recommend
that there is no trace attached. Both sides of the differential output pair
should either be left floating or terminated.
IDT82V3911 SHORT FORM DATASHEET SYNCHRONOUS ETHERNET TWO-CHANNEL PLL FOR 10GBE AND 40GBE
11 July 1, 2013
ORDERING INFORMATION
XXXXXXX XX
X
Device Type
Blank
Process
/
Temperature
Range
82V3911
Industrial
(- 40 °C to + 85 °C)
AUG
196 ball 15mm x 15mm CABGA package
IDT82V3911 SHORT FORM DATASHEET SYNCHRONOUS ETHERNET TWO-CHANNEL PLL FOR 10GBE AND 40GBE
12 July 1, 2013
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82V3911AUG8

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Description:
Clock Generators & Support Products SyncE Two Chan PLL for 10GbE and 40GbE
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