OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

84021BYLFT

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19
84021 Data Sheet 260MHz, CRYSTAL-TO-LVCMOS/LVTTL FREQUENCY SYNTHESIZER
84021 Rev E 9/23/15 7 ©2015 Integrated Device Technology, Inc
Table 4B. LVCMOS/LVTTL DC Characteristics, V
DD
= 3.3V±5%, V
DDO
= 3.3V±5%, 2.5V±5% or 1.8V±5%, T
A
= 0°C to 70°C
NOTE 1: Outputs terminated with 50 to V
DDO
/2. See Parameter Measurement Information section, Output Load Test Circuit diagrams.
Table 5. Input Frequency Characteristics, V
DD
= 3.3V±5%, V
DDO
= 3.3V±5%, 2.5V±5% or 1.8V±5%, T
A
= 0°C to 70°C
NOTE 1: For the input crystal and TEST_CLK frequency range, the M value must be set for the VCO to operate within the 620MHz to 780MHz
range. Using the minimum input frequency of 14MHz, valid values of M are 45 M 55. Using the maximum input frequency of 40MHz, valid
values of M are 16 M 19.
Table 6. Crystal Characteristics
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage 2 V
DD
+ 0.3 V
V
IL
Input
Low Voltage
OE[0:1], N[0:1], M[0:8],
XTAL_SEL, VCO_SEL,
S_DATA, S_CLOCK,
S_LOAD, nP_LOAD, MR
-0.3 0.8 V
TEST_CLOCK -0.3 1.3 V
I
IH
Input
High Current
MR, S_CLOCK,
TEST_CLK, S_DATA,
S_LOAD, nP_LOAD,
M[0:4], M[6:8], N0, N1
V
DD
= V
IN
= 3.465V 150 µA
M5, OE0, OE1,
XTAL_SEL, VCO_SEL
V
DD
= V
IN
= 3.465V 5 µA
I
IL
Input
Low Current
MR, S_CLOCK,
TEST_CLK, S_DATA,
S_LOAD, nP_LOAD,
M[0:4], M[6:8], N0, N1
V
DD
= 3.465V, V
IN
= 0V -5 µA
M5, OE0, OE1,
XTAL_SEL, VCO_SEL
V
DD
= 3.465V, V
IN
= 0V -150 µA
V
OH
Output High Voltage; NOTE 1
V
DDO
= 3.3V±5% 2.6 V
V
DDO
= 2.5V±5% 1.8 V
V
DDO
= 1.8V±5% V
DDO
- 0.3 V
V
OL
Output Low Voltage; NOTE 1
V
DDO
= 3.3V±5% or 2.5V±5% 0.5 V
V
DDO
= 1.8V±5% 0.4 V
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
IN
Input Frequency
TEST_CLK; NOTE 1 14 40 MHz
XTAL; NOTE 1 14 40 MHz
S_CLOCK 50 MHz
Parameter Test Conditions Minimum Typical Maximum Units
Mode of Oscillation Fundamental
Frequency 14 40 MHz
Equivalent Series Resistance (ESR) 50
Shunt Capacitance (C
O
) 7pF
84021 Data Sheet 260MHz, CRYSTAL-TO-LVCMOS/LVTTL FREQUENCY SYNTHESIZER
84021 Rev E 9/23/15 8 ©2015 Integrated Device Technology, Inc
AC Electrical Characteristics
Table 7A. AC Characteristics, V
DD
= V
DDO
= 3.3V±5%, T
A
= 0°C to 70°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE 1: Jitter performance using XTAL inputs.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V
DDO
/2.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
OUT
Output Frequency 103.3 260 MHz
tjit(per) Period Jitter, RMS; NOTE 1, 2
N = 3 13.5 26.4 ps
N = 4 14.7 34.2 ps
N = 5 16.7 42.4 ps
N = 6 24.7 40.8 ps
M=40, N=4, 16.667MHz XTAL,
f
OUT
=166.67MHz
4.5 6.9 ps
M=40, N=5, 16.667MHz XTAL,
f
OUT
=133.33MHz
4.6 7.8 ps
tsk(o) Output Skew; NOTE 2, 3 100 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 100 800 ps
t
S
Setup Time
M, N to nP_LOAD 5 ns
S_DATA to S_CLOCK 5 ns
S_CLOCK to S_LOAD 5 ns
t
H
Hold Time
M, N to nP_LOAD 5 ns
S_DATA to S_CLOCK 5 ns
S_CLOCK to S_LOAD 5 ns
odc Output Duty Cycle
N 344 56%
M=40, N=4, 16.667MHz XTAL,
f
OUT
=166.67MHz
45 55 %
M=40, N=5, 16.667MHz XTAL,
f
OUT
=133.33MHz
47 53 %
t
LOCK
PLL Lock Time 1ms
84021 Data Sheet 260MHz, CRYSTAL-TO-LVCMOS/LVTTL FREQUENCY SYNTHESIZER
84021 Rev E 9/23/15 9 ©2015 Integrated Device Technology, Inc
Table 7B. AC Characteristics, V
DD
= 3.3V±5%, V
DDO
= 2.5V±5%, T
A
= 0°C to 70°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE 1: Jitter performance using XTAL inputs.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V
DDO
/2.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
OUT
Output Frequency 103.3 260 MHz
tjit(per) Period Jitter, RMS; NOTE 1, 2
N = 3 11.4 18.8 ps
N = 4 13.3 28.3 ps
N = 5 16.0 39.8 ps
N = 6 19.2 32.4 ps
M=40, N=4, 16.667MHz XTAL,
f
OUT
=166.67MHz
4.3 6.2 ps
M=40, N=5, 16.667MHz XTAL,
f
OUT
=133.33MHz
4.5 7.7 ps
tsk(o) Output Skew; NOTE 2, 3 90 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 100 800 ps
t
S
Setup Time
M, N to nP_LOAD 5 ns
S_DATA to S_CLOCK 5 ns
S_CLOCK to S_LOAD 5 ns
t
H
Hold Time
M, N to nP_LOAD 5 ns
S_DATA to S_CLOCK 5 ns
S_CLOCK to S_LOAD 5 ns
odc Output Duty Cycle
N 344 56%
M=40, N=4, 16.667MHz XTAL,
f
OUT
=166.67MHz
45 55 %
M=40, N=5, 16.667MHz XTAL,
f
OUT
=133.33MHz
47 53 %
t
LOCK
PLL Lock Time 1ms
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19

84021BYLFT

Mfr. #:
Buy 84021BYLFT
Manufacturer:
IDT
Description:
Clock Synthesizer / Jitter Cleaner 260MHz Crystal LVCMOS/LVTTL Freq
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet