MAX1084/MAX1085
400ksps/300ksps, Single-Supply, Low-Power,
Serial 10-Bit ADCs with Internal Reference
______________________________________________________________________________________ 13
Figure 14 shows the recommended system ground con-
nections. Establish a single-point analog ground (“star”
ground point) at GND, separate from the logic ground.
Connect all other analog grounds and GND to this star
ground point for further noise reduction. No other digital
system ground should be connected to this single-point
analog ground. The ground return to the power supply for
this ground should be low impedance and as short as
possible for noise-free operation.
High-frequency noise in the V
DD
power supply may affect
the ADC’s high-speed comparator. Bypass this supply to
the single-point analog ground with 0.1µF and 10µF
bypass capacitors. Minimize capacitor lead lengths for
best supply-noise rejection. To reduce the effect of sup-
ply noise, a 10 resistor can be connected as a lowpass
filter to attenuate supply noise (Figure 14).
Definitions
Integral Nonlinearity
Integral nonlinearity (INL) is the deviation of the values
on an actual transfer function from a straight line. This
straight line can be either a best-straight-line fit or a line
drawn between the endpoints of the transfer function,
once offset and gain errors have been nullified. The
static linearity parameters for the MAX1084/MAX1085
are measured using the endpoints method.
Differential Nonlinearity
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1LSB. A
DNL error specification of 1LSB or less guarantees no
missing codes and a monotonic transfer function.
Aperture Jitter
Aperture jitter (t
AJ
) is the sample-to-sample variation in
the time between the samples.
Aperture Delay
Aperture delay (t
AD
) is the time defined between the
falling edge of CS and the instant when an actual sam-
ple is taken.
Signal-to-Noise Ratio
For a waveform perfectly reconstructed from digital
samples, signal-to-noise ratio (SNR) is the ratio of full-
scale analog input (RMS value) to the RMS quantization
error (residual error). The theoretical minimum analog-
to-digital noise is caused by quantization error and
results directly from the ADC’s resolution, (N bits):
CS
SCLK
DOUT
9
8
1
S0
D9
D8
D7
D6 D4
D3
D2 D1 D0 S1
D5
FIRST BYTE READ SECOND BYTE READ
HIGH-Z
HIGH-Z
CS
SCLK
DOUT
1412
1
D9
D8
D7
D6
D2D3D4 D1 D0 S1 S0
HIGH-Z
HIGH-Z
D5
Figure 12. SPI/MICROWIRE Serial Interface Timing (CPOL = CPHA = 0)
Figure 13. QSPI Serial Interface Timing (CPOL = 0, CPHA = 1)
MAX1084/MAX1085
400ksps/300ksps, Single-Supply, Low-Power,
Serial 10-Bit ADCs with Internal Reference
14 ______________________________________________________________________________________
SNR = (6.02
N + 1.76)dB
In reality, there are other noise sources besides quanti-
zation noise, including thermal noise, reference noise,
clock jitter, etc. Therefore, SNR is computed by taking
the ratio of the RMS signal to the RMS noise, which
includes all spectral components minus the fundamen-
tal, the first five harmonics, and the DC offset.
Signal-to-Noise Plus Distortion
Signal-to-noise plus distortion (SINAD) is the ratio of the
fundamental input frequency’s RMS amplitude to RMS
equivalent of all other ADC output signals.
SINAD (dB) = 20
log (SignalRMS/NoiseRMS)
Effective Number of Bits
Effective number of bits (ENOB) indicates the global
accuracy of an ADC at a specific input frequency and
sampling rate. An ideal ADC’s error consists of quanti-
zation noise only. With an input range equal to the full-
scale range of the ADC, calculate the effective number
of bits as follows:
ENOB = (SINAD - 1.76)/6.02
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the RMS
sum of the first five harmonics of the input signal to the
fundamental itself. This is expressed as:
where V1 is the fundamental amplitude, and V2 through
V5 are the amplitudes of the 2nd- through 5th-order
harmonics, respectively.
Spurious-Free Dynamic Range
Spurious-free dynamic range (SFDR) is the ratio of RMS
amplitude of the fundamental (maximum signal compo-
nent) to the RMS value of the next-largest distortion
component.
THD LOG
VVVV
V
+++
20
2
2
3
2
4
2
5
2
1
___________________Chip Information
PROCESS: BiCMOS
SUPPLIES
V
DD
V
DD
GND
DGND
V
DD
DIGITAL
CIRCUITRY
GNDV
DD
MAX1084
MAX1085
*OPTIONAL
R* = 10
4.7µF
0.1µF
Figure 14. Power-Supply Grounding Condition
MAX1084/MAX1085
400ksps/300ksps, Single-Supply, Low-Power,
Serial 10-Bit ADCs with Internal Reference
______________________________________________________________________________________ 15
PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO.
8 SO S8+5
21-0041 90-0096
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the
package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the
package regardless of RoHS status.

MAX1084BCSA+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Analog to Digital Converters - ADC 300/400ksps Sgl-Sply 4Ch Serial 10Bit
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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