RT8121
9
DS8121-02 May 2011 www.richtek.com
Applications Information
The RT8121 is a single phase synchronous buck DC/DC
converter with embedded MOSFET driver for advanced
microprocessor application power.
Supply Voltage, VCC5 Regulation and POR
There are two supply voltage pins built in the RT8121:
VCC12 and VCC5. VCC12 is a power input pin which
receives external 12V voltage for embedded driver logic
operation. VCC5 is a power output pin which is the output
of an internal 5V LDO regulator. The mentioned 5V LDO
regulator regulates VCC12 to generate a 5V voltage source
for internal gate logic and external circuit biasing, e.g.,
OCP biasing. Since the VCC5 voltage is regulated, the
variation of VCC5 (2%) will be much smaller than Platform
ATX 5V (5% to 7%). The maximum supply current of VCC5
is 10mA, which is designed only for controller circuit
biasing. The recommended configuration of the RT8121
supply voltages is as follows: Platform ATX 12V to the
VCC12 pin, and decoupling capacitors on the VCC12 and
VCC5 pins (minimum 0.1μF).
The initialization of the RT8121 requires both the voltage
on the VCC12 and VCC5 to be ready. Since VCC5 is
regulated internally from VCC12, the VCC5 voltage will
be ready (>4.6V) after VCC12 reaches about 7V, so there
is no power sequence problem between VCC12 and VCC5.
After VCC5 > 4.6V and VCC12 > 9.6V, the internal Power-
On-Reset (POR) signal goes high. This POR signal
indicates the power supply voltages are all ready and
initiates soft-start sequence. When POR = low, The
RT8121 will try to turn off both high side and low side
MOSFETs to prevent catastrophic failure.
Figure 1. Circuit for Power Ready Detection
Switching Frequency
The switching frequency of the RT8121 is set by an external
resistor connected from the RT pin either to GND or to
VCC5. If resistor is connected from RT to GND, the load
line function will be enable as well. More details will be
described in the Load Line section. The frequency vs.
different R
RT
value is shown as Figure 2.
Chip Enable
The enable function of the RT8121 is combined in the RT
pin. Besides frequency setting function, pulling the RT
pin to GND can also force the IC to enter soft shutdown
sequence. It is recommended to connect a control switch
from RT pin to GND in parallel with RT setting resistors.
The RT8121 will enter soft shutdown sequence when the
control switch is turned on.
Soft-Start
The V
OUT
soft-start slew rate is set by a capacitor from
the SS pin to FBRTN. Before Power On Reset (POR =
low), the SS pin is held at GND. After Power On Reset
(POR = high) and an extra delay of 1600μs (TD1), the
controller initiates ramping up. V
OUT
will always trace V
EAP
during normal operation of the RT8121, where V
EAP
is the
positive input of compensation error amplifier, which can
be described as V
EAP
= V
DAC
− V
ADJ
(The definition of V
ADJ
will be described later in the Load Line section). After
receiving valid VID code, V
OUT
continues ramping up or
+
-
CMP
+
-
CMP
4.6V
9.6V
VCC12
VCC5
POR
(POR : Power ON Reset)
Figure 2. Switching Frequency vs. R
RT
Resistance
0
200
400
600
800
1000
0 1020304050607080
R
RT
Switching Frequency (kHz) 1
(kΩ)
