AD8802ARUZ-REEL Datasheet AD8804ARUZ, AD8802ARUZ, AD8802ARUZ-REEL | P10-P12

AD8802/AD8804

REV. 0

–10–

;

; This subroutine loads an AD8802/AD8804 DAC from an 8051 microcomputer,

; using the 8051’s serial port in MODE 0 (Shift Register Mode).

; The DAC value is stored at location DAC_VAL

; The DAC address is stored at location DAC_ADDR

;

; Variable declarations

;

PORT1 DATA 90H ;SFR register for port 1

DAC_VALUE DATA 40H ;DAC Value

DAC_ADDR DATA 41H ;DAC Address

SHIFT1 DATA 042H ;high byte of 16-bit answer

SHIFT2 DATA 043H ;low byte of answer

SHIFT_COUNT DATA 44H ;

;

ORG 100H ;arbitrary start

DO_8802: CLR SCON.7 ;set serial

CLR SCON.6 ;data mode 0

CLR SCON.5

CLR SCON.1 ;clr transmit flag

ORL PORT1.1,#00001110B ;/RS, /SHDN, /CS high

CLR PORT1.1 ;set the /CS low

MOV SHIFT1,DAC_ADDR ;put DAC value in shift register

ACALL BYTESWAP ;

MOV SBUF,SHIFT2 ;send the address byte

ADDR_WAIT: JNB SCON.1,ADDR_WAIT ;wait until 8 bits are sent

CLR SCON.1 ;clear the serial transmit flag

MOV SHIFT1,DAC_VALUE ;send the DAC value

ACALL BYTESWAP ;

MOV SBUF,SHIFT2 ;

VALU_WAIT: JNB SCON.1,VALU_WAIT ;wait again

CLR SCON.1 ;clear serial flag

SETB PORT1.1 ;/CS high, latch data

RET ; into AD8801

;

BYTESWAP: MOV SHIFT_COUNT,#8 ;Shift 8 bits

SWAP_LOOP: MOV A,SHIFT1 ;Get source byte

RLC A ;Rotate MSB to carry

MOV SHIFT1,A ;Save new source byte

MOV A,SHIFT2 ;Get destination byte

RRC A ;Move carry to MSB

MOV SHIFT2,A ;Save

DJNZ SHIFT_COUNT,SWAP_LOOP ;Done?

RET

END

Listing 1. Software for the 8051 to AD8802/AD8804 Serial Port Interface

+5V

P1.7

P1.6

P1.5

P1.4

1.51.61.7

PORT 1

8051 µC

1.4

CLK

REFL

SDI

O12

SHDN

GND

AD8804

REFH

Figure 25. An AD8802/AD8804-8051

C Interface Using

Parallel Port 1

to start the serial interface process. The DAC address is loaded

into the accumulator and four Rotate Right shifts are per-

formed. This places the DAC address in the 4 MSBs of the ac-

cumulator. The address is then sent to the AD8802/AD8804 via

the SEND_SERIAL subroutine. Next, the DAC value is loaded

into the accumulator and sent to the AD8802/AD8804. Finally,

the Chip Select input is set high to complete the data transfer

Unlike the serial port interface of Figure 24, the parallel port in-

terface only transmits 12 bits to the AD8802/AD8804. Also, the

BYTESWAP subroutine is not required for the parallel inter-

face, because data can be shifted out MSB first. However, the

results of the two interface methods are exactly identical. In

most cases, the decision on which method to use will be deter-

mined by whether or not the serial data port is available for

communication with the AD8802/AD8804.

AD8802/AD8804

REV. 0

–11–

; This 8051 µC subroutine loads an AD8802 or AD8804 DAC with an 8-bit value,

; using the 8051’s parallel port #1.

; The DAC value is stored at location DAC_VALUE

; The DAC address is stored at location DAC_ADDR

;

; Variable declarations

PORT1 DATA 90H ;SFR register for port 1

DAC_VALUE DATA 40H ;DAC Value

DAC_ADDR DATA 41H ;DAC Address (0 through 7)

LOOPCOUNT DATA 43H ;COUNT LOOPS

;

ORG 100H ;arbitrary start

LD_8804: ORL PORT1,#11110000B ;set CLK, /CS and /SHDN high

CLR PORT1.5 ;Set Chip Select low

MOV LOOPCOUNT,#4 ;Address is 4 bits

MOV A,DAC_ADDR ;Get DAC address

RR A ;Rotate the DAC

RR A ;address to the Most

RR A ;Significant Bits (MSBs)

RR A ;

ACALL SEND_SERIAL ;Send the address

MOV LOOPCOUNT,#8 ;Do 8 bits of data

MOV A,DAC_VALUE

ACALL SEND_SERIAL ;Send the data

SETB PORT1.5 ;Set /CS high

RET ;DONE

SEND_SERIAL: RLC A ;Move next bit to carry

MOV PORT1.7,C ;Move data to SDI

CLR PORT1.6 ;Pulse the

SETB PORT1.6 ;CLK input

DJNZ LOOPCOUNT,SEND_SERIAL ;Loop if not done

RET;

END

Listing 2. Software for the 8051 to AD8802/AD8804 Parallel Port Interface

An MC68HC11-to-AD8802/AD8804 Interface

Like the 8051 µC, the MC68HC11 includes a dedicated serial

data port (labeled SPI). The SPI port provides an easy interface

to the AD8802/AD8804 (Figure 27). The interface uses three

lines of Port D for the serial data, and one or two lines from

Port C to control the

SHDN and RS (AD8802 only) inputs.

SDI

CLK

SHDN

RS (AD8802 ONLY)

AD8802/

AD8804*

MC68HC11*

MOSI

SCK

PC0

PC1

(PD3)

(PD4)

(PD5)

*ADDITIONAL PINS OMITTED FOR CLARITY

Figure 26. An AD8802/AD8804-to-MC68HC11 Interface

A software routine for loading the AD8802/AD8804 from a

68HC11 evaluation board is shown in Listing 3. First, the

MC68HC11 is configured for SPI operation. Bits CPHA and

CPOL define the SPI mode wherein the serial clock (SCK) is

high at the beginning and end of transmission, and data is valid

on the rising edge of SCK. This mode matches the requirements

of the AD8802/AD8804. After the registers are saved on the

stack, the DAC value and address are transferred to RAM and

the AD8802/AD8804’s

CS is driven low. Next, the DAC’s ad-

dress byte is transferred to the SPDR register, which automati-

cally initiates the SPI data transfer. The program tests the SPIF

bit and loops until the data transfer is complete. Then the DAC

value is sent to the SPI. When transmission of the second byte is

complete,

CS is driven high to load the new data and address

into the AD8802/AD8804.

AD8802/AD8804

REV. 0

–12–

* AD8802/AD8804 to M68HC11 Interface Assembly Program

* M68HC11 Register definitions

PORTC EQU $1003 Port C control register

* “0,0,0,0;0,0,RS/, SHDN/”

DDRC EQU $1007 Port C data direction

PORTD EQU $1008 Port D data register

* “0,0,/CS,CLK;SDI,0,0,0”

DDRD EQU $1009 Port D data direction

SPCR EQU $1028 SPI control register

* “SPIE,SPE,DWOM,MSTR;CPOL,CPHA,SPR1,SPR0”

SPSR EQU $1029 SPI status register

* “SPIF,WCOL,0,MODF;0,0,0,0”

SPDR EQU $102A SPI data register; Read-Buffer; Write-Shifter

* SDI RAM variables: SDI1 is encoded from 0H to 7H

* SDI2 is encoded from 00H to FFH

* AD8802/AD8804 requires two 8-bit loads; upper 4 bits

* of SDI1 are ignored. AD8802/AD8804 address bits in last

* four LSBs of SDI1.

SDI1 EQU $00 SDI packed byte 1 “0,0,0,0;A3,A2,A1,A0”

SDI2 EQU $01 SDI packed byte 2 “DB7–DB4;DB3–DB0”

* Main Program

ORG $C000 Start of user’s RAM in EVB

INIT LDS #$CFFF Top of C page RAM

* Initialize Port C Outputs

LDAA #$03 0,0,0,0;0,0,1,1

* /RS-Hi, /SHDN-Hi

STAA PORTC Initialize Port C Outputs

LDAA #$03 0,0,0,0;0,0,1,1

STAA DDRC /RS and /SHDN are now enabled as outputs

* Initialize Port D Outputs

LDAA #$20 0,0,1,0;0,0,0,0

* /CS-Hi,/CLK-Lo,SDI-Lo

STAA PORTD Initialize Port D Outputs

LDAA #$38 0,0,1,1;1,0,0,0

STAA DDRD /CS,CLK, and SDI are now enabled as outputs

* Initialize SPI Interface

LDAA #$53

STAA SPCR SPI is Master,CPHA=0,CPOL=0,Clk rate=E/32

* Call update subroutine

BSR UPDATE Xfer 2 8-bit words to AD8402

JMP $E000 Restart BUFFALO

* Subroutine UPDATE

UPDATE PSHX Save registers X, Y, and A

PSHY

PSHA

* Enter Contents of SDI1 Data Register

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P16

AD8802ARUZ-REEL

Mfr. #:

Buy AD8802ARUZ-REEL

Manufacturer:

Analog Devices Inc.

Description:

Digital to Analog Converters - DAC 12CH 8-Bit w/ Power Shutdown

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