AD8802/AD8804
REV. 0
–13–
*
LDAA $0000 Hi-byte data loaded from memory
STAA SDI1 SDI1 = data in location 0000H
*
* Enter Contents of SDI2 Data Register
*
LDAA $0001 Low-byte data loaded from memory
STAA SDI2 SDI2 = Data in location 0001H
*
LDX #SDI1 Stack pointer at 1st byte to send via SDI
LDY #$1000 Stack pointer at on-chip registers
*
* Reset AD8802 to one-half scale (AD8804 does not have a Reset input)
*
BCLR PORTC,Y $02 Assert /RS
BSET PORTC,Y $02 De-Assert /RS
*
* Get AD8802/04 ready for data input
*
BCLR PORTD,Y $02 Assert /CS
*
TFRLP LDAA 0,X Get a byte to transfer for SPI
STAA SPDR Write SDI data reg to start xfer
*
WAIT LDAA SPSR Loop to wait for SPIF
BPL WAIT SPIF is the MSB of SPSR
*
INX Increment counter to next byte for xfer
CPX #SDI2+1 Are we done yet ?
BNE TFRLP If not, xfer the second byte
*
* Update AD8802 output
*
BSET PORTD,Y $20 Latch register & update AD8802
*
PULA When done, restore registers X, Y & A
PULY
PULX
RTS ** Return to Main Program **
Listing 3. AD8802/AD8804 to MC68HC11 Interface Program Source Code
An Intelligent Temperature Control System—Interfacing the
8051 mC with the AD8802/AD8804 and TMP14
Connecting the 80CL51 µC, or any modern microcontroller,
with the TMP14 and AD8802/AD8804 yields a powerful tem-
perature control tool, as shown in Figure 27. For example, the
80CL51 µC controls the TrimDACs allowing the user to auto-
matically set the temperature setpoints voltages of the TMP14
via computer or touch pad, while the TMP14 senses the tem-
perature and outputs four open-collector trip-points. Feeding
these trip-point outputs back to the 80CL51 µC allow it to sense
whether or not a setpoint has been exceeded. Additional
80CL51 µC port pins or TMP14 trip-point outputs may then
be used to change fan speed (i.e., high, medium, low, off), or
increase/decrease the power level to a heater. (Please refer to the
TMP14 data sheet for more applications information.)
The
CS (Chip Select) on the AD8802/AD8804 makes applica-
tions that call for large temperature sensor arrays possible. In
addition, the 12 channels of the AD8802/AD8804 allow inde-
pendent setpoint control for all four trip-point outputs on up to
three TMP14 temperature sensors. For example, assume that
the 80CL51 µC has eight free port pins available after all user
interface lines, interrupts, and the serial port lines have been
assigned. The eight port pins may be used as chip selects, in
which case an array of eight AD8802/AD8804s controlling
twenty-four TMP14 sensors is possible.
The AD8802/AD8804 and TMP14 are also ideal choices for
low power applications. These devices have power shutdown
modes and operate on a single 5 Volt supply. When their shut-
down modes are activated current consumption is reduced to
less than 35 µA. However, at high operating frequencies
(12 MHz) the 80CL51 consumes far more energy (18 mA typ)
than the AD8802/AD8804 and TMP14 combined. Therefore,
to achieve a low power design the 80CL51 should operate at its
lowest possible frequency or be placed in its power-down mode
at the end of each instruction sequence.
To use the power-down mode of the 80CL51 µC set PCON.1
as the last instruction executed prior to going into the power-
down mode. If INT2 and INT9 are enabled, the 80CL51 µC
can be awakened from power-down mode with external inter-
rupts. As shown in Figure 28, the TLC555 outputs a pulse
every few seconds providing the interrupt to restart the 80CL51
µC which then samples the user input pins, the outputs of the
AD8802/AD8804
REV. 0
–14–
USER
INPUTS
3
TO 2nd AD8802/4
ARRAY IF NEEDED
TO 2nd TEMP SENSOR
IF NEEDED
4
TO 3rd TEMP SENSOR
IF NEEDED
4
0.1µF
10µF
+5V
+5V
0.1µF
TMP14
0.01µF
3
V
CC
OUT
RS
DIS
THR
TRIG
GND
AD8802/4
TLC555
2.5 V
REF
SET 1
SET 2
SET 3
SET 4
HYS
TRIP 1
TRIP 2
TRIP 3
TRIP 4
V
+
GND
SLEEP
O1
O3
O4
O2
05–8
09–12
V
DD
GND
SHDN
CS
CLK
SDI
P2.0
P2.1
P2.2
P2.3
P2.4
80CL51 µC
P1.0/INT2
P0.0
P0.7
P3.2
P3.1
P3.0
P3.3
V
REFH
+5V
Figure 27. Temperature Sensor Array with Programmable Setpoints
The gain of the SSM2018T is controlled by the voltage at Pin 11.
For maximum attenuation of –100 dB a control signal of 3.0 V
typ is necessary. The control signal has a scale of –30 mV/dB
centered around 0 dB gain for 0 V of control voltage, therefore,
for a maximum gain of 40 dB a control voltage of –1.2 volts is
necessary. Now notice that the normal +5 V to GND voltage
range of the AD8802/AD8804 does not cover the 3.0 V to
–1.2 V operational gain control range of the SSM2018T. To
cover the operating gain range fully and not exceed the maxi-
mum specified power supply rating requires the O1 output of
AD8802/AD8804 to be level shifted down. In Figure 28, the
level shifting is accomplished by a Zener diode and 1/4 of an
OP420 quad op amp. For applications that require only
TMP14, and makes the necessary adjustments to the AD8802/
AD8804 before shutting down again. The 80CL51 consumes
only 50 µA when operating at 32 kHz, in which case there
would be no need for the TLC555, which consumes 1 mW typ.
12 Channel Programmable Voltage Controlled Amplifier
The SSM2018T is a trimless Voltage Controlled Amplifier
(VCA) for volume control in audio systems. The SSM2018T is
the first professional quality audio VCA in the marketplace that
does not require an external trimming potentiometer to mini-
mize distortion. The TrimDAC shown in Figure 28 is not being
used to trim distortion, but rather to control the gain of the am-
plifier. In this configuration up to twelve SSM2018T can be
digitally controlled. (Please refer to the SSM2018T data sheet
for more specifications and applications information.)
–15V
R
O
150k
+V
50pF
18k
18k
1µF
18k
1µF
+15V
8
1
2
3
4
7
6
5
14
13
12
11
16
15
10
9
SSM2018T
OP420A
1.2V
+15V
50k
OPTIONAL FOR
0 TO 40dB GAIN
V
OUT
O1
V
REFH
O2–
O12
TO 8 MORE CHANNELS
O2
O3
O4–O12
CS
CLK
SDI
3
TO µC
1µF
V
REFL
(AD8804
ONLY)
OUT
IN
GND
REF195
V+
GND
+15V
AD8802/4
47pF
NC
Figure 28. 12-Channel Programmable Voltage Controlled Amplifier
AD8802/AD8804
REV. 0
–15–
15
13
–H SYNC
OUTPUT
40, 35, 30
38, 28, 33
BLANK GATE
INPUT
24
+4V
V
CC
(+12V)
+12V
V
CC
9
43
22
21
20
5
RGB FEEDBACK
CRT
VIDEO
AMP
CRT
CATHODE
0.1µF 10µF
OUT IN
GND
REF195
10µF
0.1µF
+12V
V
CC
TO µC
O1 O2 O3 04 O5 O6 O7
V
REFH
CS
CLK
SDI
AD8802/4
RGB
VIDEO
INPUT
7, 11, 17
LM1204
O1 = 2V
O2 = CONTRAST
O3 = BP CLAMP WIDTH ADJUST
O4 = BLANK LEVEL ADJUST
(FOR BRIGHTNESS CONTROL)
O5 = R AGAIN
O6 = B AGAIN
O7 = G AGAIN
O8 – O12 = NOT USED
R GAIN
B GAIN
G GAIN
Figure 29. A Digitally Controlled LM1204—150 MHz RGB Amplifier System
attenuation the optional circuitry inside the dashed box may be
removed and replaced with a direct connection from O1 of
AD8802/AD8804 to Pin 11 of SSM2018T.
When high gain resolution is desired, V
REFH
and V
REFL
may be
decoupled from the power rails and shifted closer together.
This technique increases the gain resolution with the unfortu-
nate penalty of decreased gain range.
A Digitally Controlled LM1204 150 MHz RGB Amplifier
System
The LM1204 is an industry standard video amplifier system.
Figure 29 illustrates a configuration that removes the usual
seven level setting potentiometers and replaces them with only
one IC. The AD8802/AD8804, in addition to being smaller
and more reliable than mechanical potentiometers, has the
added feature of digital control.
The REF195 is a 5.0 V reference used to supply both the power
and reference voltages to the AD8802/AD8804. This is possible
because of the high reference output current available (30 mA
typical) together with the low power consumption of the
AD8802/AD8804.
A Low Noise 90 MHz Programmable Gain Amplifier
The AD603 is a low noise, voltage-controlled amplifier for use
in RF and IF AGC systems. It provides accurate, pin selectable
gains of –11 dB to +31 dB with a bandwidth of 90 MHz or
+9 dB to +51 dB with a bandwidth of 9 MHz. Any intermedi-
ate gain range may be arranged using one external resistor
between Pins 5 and 7. The input referred noise spectral density
is only 1.3 nV
Hz and power consumption is 125 mW at the
recommended ±5 V supplies.
The decibel gain is “linear in dB,” accurately calibrated, and
stable over temperature and supply. The gain is controlled at a
high impedance (50 M), low bias (200 nA) differential input;
the scaling is 25 mV/dB, requiring a gain-control voltage of only
1 V to span the central 40 dB of the gain range. An overrange
and underrange of 1 dB is provided whatever the selected
range. The gain-control response time is less than 1 µs for a 40
dB change. The settling time of the AD8802/AD8804 to within
a ±1/2 LSB band is 0.6 µs making it an excellent choice for con-
trol of the AD603.
The differential gain-control interface allows the use of either
differential or single-ended positive or negative control voltages,
where the common-mode range is –1.2 V to 2.0 V. Once again
the AD8802/AD8804 is ideally suited to provide the differential
input range of 1 V within the common-mode range of 0 V to
2 V. To accomplish this, place V
REFH
at 2.0 V and V
REFL
at
1.0 V, then all 256 voltage levels of the AD8804 will fall within
the gain-control range of the AD603. Please refer to the AD603
data sheet for further information regarding gain control, layout,
and general operation.
The dual OP279 is a rail-to-rail op amp used in Figure 30 to
drive the inputs V
REFH
and V
REFL
because these reference inputs
are low impedance (2 k typical).

AD8802ARUZ-REEL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC 12CH 8-Bit w/ Power Shutdown
Lifecycle:
New from this manufacturer.
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