20
LTC3732
3732f
master’s frequency. A voltage of 1.7V or below applied to
the master oscillator’s PLLFLTR pin is recommended in
order to meet this requirement. The resultant operating
frequency will be approximately 550kHz for 1.7V.
The loop filter components (C
LP
, R
LP
) smooth out the
current pulses from the phase detector and provide a
stable input to the voltage controlled oscillator. The filter
components C
LP
and R
LP
determine how fast the loop
acquires lock. Typically R
LP
=10k and C
LP
ranges from
0.01µF to 0.1µF.
Minimum On-Time Considerations
Minimum on-time, t
ON(MIN)
, is the smallest time duration
that the IC is capable of turning on the top MOSFET. It is
determined by internal timing delays and the gate charge
of the top MOSFET. Low duty cycle applications may
approach this minimum on-time limit and care should be
taken to ensure that:
t
V
Vf
ON MIN
OUT
IN
()
<
()
If the duty cycle falls below what can be accommodated by
the minimum on-time, the IC will begin to skip every other
cycle, resulting in half-frequency operation. The output
voltage will continue to be regulated, but the ripple current
and ripple voltage will increase.
The minimum on-time for the IC is generally about 110ns.
However, as the peak sense voltage decreases the mini-
mum on-time gradually increases. This is of particular
concern in forced continuous applications with low ripple
current at light loads. If the duty cycle drops below the
minimum on-time limit in this situation, a significant
amount of cycle skipping can occur with correspondingly
larger current and voltage ripple.
If an application can operate close to the minimum on-
time limit, an inductor must be chosen that is low enough
in value to provide sufficient ripple amplitude to meet the
minimum on-time requirement.
As a general rule, keep
the
inductor ripple current equal to or greater than 30%
of I
OUT(MAX)
at V
IN(MAX)
.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can be
expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in DC (resistive) load
current. When a load step occurs, V
OUT
shifts by an
amount equal to ∆I
LOAD
• ESR, where ESR is the effective
series resistance of C
OUT
. ∆I
LOAD
also begins to charge or
discharge C
OUT
, generating the feedback error signal that
forces the regulator to adapt to the current change and
return V
OUT
to its steady-state value. During this recovery
time, V
OUT
can be monitored for excessive overshoot or
ringing, which would indicate a stability problem. The
availability of the I
TH
pin not only allows optimization of
control loop behavior, but also provides a DC coupled
and AC filtered closed-loop response test point. The DC
step, rise time and settling at this test point truly reflects
the closed-loop response. Assuming a predominantly
second order system, phase margin and/or damping
factor can be estimated using the percentage of overshoot
seen at this pin. The bandwidth can also be estimated by
examining the rise time at the pin. The I
TH
external com-
ponents shown in the Figure 1 circuit will provide an
adequate starting point for most applications.
The I
TH
series R
C
-C
C
filter sets the dominant pole-zero
loop compensation. The values can be modified slightly
(from 0.2 to 5 times their suggested values) to maximize
transient response once the final PC layout is done and the
particular output capacitor type and value have been
determined. The output capacitors need to be decided
upon because the various types and values determine the
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