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IS42RM16160D-7BL

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P25
16 Integrated Silicon Solution, Inc. - www.issi.com
Rev. A
10/22/09
IS42SM83200D / IS42SM16160D / IS42SM32800D
IS42RM83200D / IS42RM16160D / IS42RM32800D
Symbol Parameter Test Condition –7 –10 Unit
I
d d 1
(1)
Operating Current One Bank Active, CL = 3, BL = 1,
tclK = tCLK(min), tRC = tRC(min)
85 75 mA
I
d d 2p
(4)
Precharge Standby Current
(In Power-Down Mode)
CKE ≤ V
i l (max), tCK = 15ns
CS ≥ V
d d - 0.2V
1 1 mA
I
d d 2p s
(4)
Precharge Standby Current
With Clock Stop
(In Power-Down Mode)
CKE ≤ V
i l (max), CLK ≤ Vi l (max)
CS ≥ V
d d - 0.2V
1 1 mA
I
d d 2n
(2)
Precharge Standby Current
(In Non Power-Down Mode)
CS ≥ Vd d - 0.2V, CKE ≥ Vi h (min)
tCK = 15 ns
35 35 mA
I
d d 2n s Precharge Standby Current
With Clock Stop
(In Non-Power Down Mode)
CS ≥ Vd d - 0.2V, CKE ≥ Vi h (min)
All Inputs Stable
20 20 mA
I
d d 3p
(2)
Active Standby Current
(In Power-Down Mode)
CKE ≤ Vi l (max), CS ≥ Vd d - 0.2V
tCK = 15 ns
2 2 mA
I
d d 3p s Active Standby Current
With Clock Stop
(In Power-Down Mode)
CKE ≤ V
i l (max), CLK ≤ Vi l (max)
CS ≥ V
d d - 0.2V
2 2 mA
I
d d 3n
(2)
Active Standby Current
(In Non Power-Down Mode)
CS ≥ Vd d - 0.2V, CKE ≥ Vi h (min)
tCK = 15 ns
40 40 mA
I
d d 3n s Active Standby Current
With Clock Stop
(In Non Power-Down Mode)
CS ≥ V
d d - 0.2V, CKE ≥ Vi h (min)
All Inputs Stable
25 25 mA
I
d d 4 Operating Current All Banks Active, BL = FULL, CL = 3
tCK = tCK(min)
110 80 mA
I
d d 5 Auto-Refresh Current tRC = tRC(min), tCLK = tCLK(min) 160 120 mA
I
d d 6 Self-Refresh Current CKE ≤ 0.2V 1.2 1.2 mA
I
d d 7 Self-Refresh: CKE = LOW;
t
c K = tc K (MIN); Address,
Control, and Data bus inputs
are stable
Full Array, 85
o
C
Full Array, 45
o
C
Half Array, 85
o
C
Half Array, 45
o
C
1/4th Array, 85
o
C
1/4th Array, 45
o
C
1/8th Array, 85
o
C
1/8th Array, 45
o
C
1/16th Array, 85
o
C
1/16th Array, 45
o
C
1200
800
1000
670
800
540
700
470
600
400
mA
I
z z
(3,4)
Deep Power Down Current CKE ≤ 0.2V 20 20 mA
DC ELECTRICAL CHARACTERISTICS VDD = 3.3V/2.5V (x8 and x16)
Notes:
1. I
d d (max) is specified at the output open condition.
2. Input signals are changed one time during 30ns.
3. Izz values shown are nominal at 25
o
C. Izz is not tested.
4. Tested after 500ms delay
Integrated Silicon Solution, Inc. - www.issi.com 17
Rev. A
10/22/09
IS42SM83200D / IS42SM16160D / IS42SM32800D
IS42RM83200D / IS42RM16160D / IS42RM32800D
Symbol Parameter Test Condition –75 –10 Unit
I
d d 1
(1)
Operating Current One Bank Active, CL = 3, BL = 1,
tclK = tCLK(min), tRC = tRC(min)
130 110 mA
I
d d 2p
(4)
Precharge Standby Current
(In Power-Down Mode)
CKE ≤ V
i l (max), tCK = 15ns
CS ≥ V
d d - 0.2V
1 1 mA
I
d d 2p s
(4)
Precharge Standby Current
With Clock Stop
(In Power-Down Mode)
CKE ≤ V
i l (max), CLK ≤ Vi l (max)
CS ≥ V
d d - 0.2V
1 1 mA
I
d d 2n
(2)
Precharge Standby Current
(In Non Power-Down Mode)
CS ≥ Vd d - 0.2V, CKE ≥ Vi h (min)
tCK = 15 ns
45 45 mA
I
d d 2n s Precharge Standby Current
With Clock Stop
(In Non-Power Down Mode)
CS ≥ V
d d - 0.2V, CKE ≥ Vi h (min)
All Inputs Stable
30 30 mA
I
d d 3p
(2)
Active Standby Current
(In Power-Down Mode)
CKE ≤ V
i l (max), CS ≥ Vd d - 0.2V
tCK = 15 ns
4 4 mA
I
d d 3p s Active Standby Current
With Clock Stop
(In Power-Down Mode)
CKE ≤ V
i l (max), CLK ≤ Vi l (max)
CS ≥ V
d d - 0.2V
3 3 mA
I
d d 3n
(2)
Active Standby Current
(In Non Power-Down Mode)
CS ≥ V
d d - 0.2V, CKE ≥ Vi h (min)
tCK = 15 ns
55 55 mA
I
d d 3n s Active Standby Current
With Clock Stop
(In Non Power-Down Mode)
CS ≥ Vd d - 0.2V, CKE ≥ Vi h (min)
All Inputs Stable
30 30 mA
I
d d 4 Operating Current All Banks Active, BL = FULL, CL = 3
tCK = tCK(min)
160 120 mA
I
d d 5 Auto-Refresh Current tRC = tRC(min), tCLK = tCLK(min) 280 240 mA
I
d d 6 Self-Refresh Current CKE ≤ 0.2V 1.2 1.2 mA
I
d d 7 Self-Refresh: CKE = LOW;
t
c K = tc K (MIN); Address,
Control, and Data bus inputs
are stable
Full Array, 85
o
C
Full Array, 45
o
C
Half Array, 85
o
C
Half Array, 45
o
C
1/4th Array, 85
o
C
1/4th Array, 45
o
C
1/8th Array, 85
o
C
1/8th Array, 45
o
C
1/16th Array, 85
o
C
1/16th Array, 45
o
C
1200
800
1000
670
800
540
700
470
600
400
mA
I
z z
(3,4)
Deep Power Down Current CKE ≤ 0.2V 20 20 mA
DC ELECTRICAL CHARACTERISTICS VDD = 3.3V/2.5V (x32)
Notes:
1. I
d d (max) is specified at the output open condition.
2. Input signals are changed one time during 30ns.
3. Izz values shown are nominal at 25
o
C. Izz is not tested.
4. Tested after 500ms delay
18 Integrated Silicon Solution, Inc. - www.issi.com
Rev. A
10/22/09
IS42SM83200D / IS42SM16160D / IS42SM32800D
IS42RM83200D / IS42RM16160D / IS42RM32800D
AC ELECTRICAL CHARACTERISTICS
(1, 2, 3)
-7
(x8/x16 only)
-75
(x32 only)
-10
Symbol Parameter Min. Max. Min. Max. Min. Max. Unit
tCK3
tCK2
Clock Cycle Time
CAS Latency = 3
CAS Latency = 2
7
9.6
–
–
7.5
9.6
–
–
10
12
–
–
ns
ns
tAC3
tAC2
Access Time From CLK
CAS Latency = 3
CAS Latency = 2
–
–
5.4
8.0
–
–
5.4
8.0
–
–
8.0
9.0
ns
ns
tCHI CLK HIGH Level Width 2.5 – 2.5 – 2.5 – ns
tCL CLK LOW Level Width 2.5 – 2.5 – 2.5 – ns
tOH3
tOH2
Output Data Hold Time
CAS Latency = 3
CAS Latency = 2
2.7
2.7
–
–
2.7
2.7
–
–
2.7
2.7
–
–
ns
ns
tLZ Output LOW Impedance Time 0 – 0 – 0 – ns
tHZ3
tHZ2
Output HIGH Impedance Time
CAS Latency = 3
CAS Latency = 2
2.7
2.7
5.4
8.0
2.7
2.7
5.4
8.0
2.7
2.7
8.0
9.0
ns
tDS Input Data Setup Time
(2)
1.5 – 1.5 – 1.5 – ns
tDH Input Data Hold Time
(2)
1.0 – 1.0 – 1.0 – ns
tAS Address Setup Time
(2)
1.5 – 1.5 – 1.5 – ns
tAH Address Hold Time
(2)
1.0 – 1.0 – 1.0 – ns
tCKS CKE Setup Time
(2)
1.5 – 1.5 – 1.5 – ns
tCKH CKE Hold Time
(2)
1.0 – 1.0 – 1.0 – ns
tCS
Command Setup Time (CS,
RAS, CAS, WE, DQM)
(2)
1.5 – 1.5 – 1.5 – ns
tCH
Command Hold Time (CS,
RAS, CAS, WE, DQM)
(2)
1.0 – 1.0 – 1.0 – ns
tRC Command Period (REF to REF
/ ACT to ACT)
67.5 – 67.5 – 90 – ns
tRAS Command Period (ACT to
PRE)
45 100K 45 100K 60 100K ns
tRP Command Period (PRE to
ACT)
19 – 19 – 24 – ns
tRCD Active Command to Read/
Write Command Delay Time
19 – 19 – 24 – ns
tRRD Command Period (ACT [0] to
ACT [1])
14 – 15 – 20 – ns
tDPL Input Data to Precharge 14 – 15 – 20 – ns
Command Delay Time
tDAL Input Data to Active/Refresh
Command Delay Time (During
Auto-Precharge)
35 – 37.5 – 48 – ns
tMRD Mode Register Program Time 14 – 15 – 20 – ns
tDDE Power Down Exit Setup Time 7 – 7.5 – 10 – ns
tSRX Self-Refresh Exit Time 80 – 80 – 80 – ns
tT Transition Time 0.3 1.2 0.3 1.2 0.3 1.2 ns
tREF Refresh Cycle Time
8K times (x8/x16)
– 64 – – – 64 ms
4K times (x32)
– – – 64 – 64 ms
Notes:
1. The power-on sequence must be executed before starting memory operation.
2. Measured with tT = 1 ns. If clock rising time is longer than 1ns, (tR /2 - 0.5) ns should be added to the parameter.
3. The reference level is 1.4V when measuring input signal timing. Rise and fall times are measured between
V
i h (min.) and Vi l (max).
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P25

IS42RM16160D-7BL

Mfr. #:
Buy IS42RM16160D-7BL
Manufacturer:
ISSI
Description:
DRAM 256M (16Mx16) 143MHz Mobile SDRAM, 2.5v
Lifecycle:
New from this manufacturer.
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