NCP1380
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16
Figure 29. Zoom 1: 1
st
to 2
nd
Valley Transition
Figure 30. Zoom 2: 2
nd
to 3
rd
Valley Transition
NCP1380
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17
Figure 31. Zoom 3: 3
rd
to 4
th
Valley Transition
Figure 32. Zoom 4: 4
th
Valley to VCO Mode Transition
Time Out
In case of extremely damped free oscillations, the ZCD
comparator can be unable to detect the valleys. To avoid
such situation, NCP1380 integrates a Time Out function that
acts as a substitute clock for the decimal counter inside the
logic bloc. The controller thus continues its normal
operation. To avoid having a too big step in frequency, the
time out duration is set to 5.5 ms. Figures 34 and 35 detail the
time out operation.
The NCP1380 also features an extended time out during
the soft−start.
Indeed, at startup, the output voltage reflected on the
auxiliary winding is low. Because of the voltage drop
introduced by the Over Power Compensation diode
(Figure 40), the voltage on the ZCD pin is very low and the
ZCD comparator might be unable to detect the valleys. In
this condition, setting the DRV Latch with the 5.5 ms
time−out can lead to a continuous conduction mode
operation (CCM) at the beginning of the soft−start. This
CCM operation only last a few cycles until the voltage on
ZCD pin becomes high enough to be detected by the ZCD
comparator. To avoid this, the time−out duration is extended
to 40 ms during the soft−start in order to ensure that the
transformer is fully demagnetized before the MOSFET is
turned−on.
NCP1380
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18
+
ZCD
10 V
ES D
Vth
DRV
3 us pulse
5.5 us time out
demag
leakage blanking
LOGIC BL OCK
VDD
TimeOut
SS e nd
SS e nd
40 us time out
Figure 33. Time Out Circuit
Figure 34. Time Out Case n51: the 3
rd
Valley is Missing

NCP1380BDR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Switching Controllers QUASI-RES CUR MODE CONTRL
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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