ADP3629/ADP3630/ADP3631
Rev. 0 | Page 11 of 16
THEORY OF OPERATION
The ADP3629/ADP3630/ADP3631 family of dual drivers is
optimized for driving two independent enhancement N-channel
MOSFETs or insulated gate bipolar transistors (IGBTs) in high
switching frequency applications.
These applications require high speed, fast rise and fall times, and
short propagation delays. The capacitive nature of MOSFETs and
IGBTs requires high peak current capability, as well.
VDD
V
DD
PGND
OUTA
OUTB
SD
OTW
1
3
8
7
6
5
2
4
V
DS
V
DS
ADP3629/ADP3630/ADP3631
B
NONINVERTING
INVERTING
A
NONINVERTING
INVERTING
INA,
INA
INB,
INB
08401-017
Figure 21. Typical Application Circuit
INPUT DRIVE REQUIREMENTS (INA, INA, INB, INB,
AND SD)
The inputs of the ADP3629/ADP3630/ADP3631 are designed
to meet the requirements of modern digital power controllers;
the signals are compatible with 3.3 V logic levels. At the same
time, the input structure allows for input voltages as high as V
DD
.
The signals applied to the inputs (INA,
INA
, INB, and
INB
)
should have steep and clean fronts. It is not recommended that
slow changing signals be applied to drive these inputs because
such signals can result in multiple switching output signals
when the thresholds are crossed, causing damage to the power
MOSFET or IGBT.
An internal pull-down resistor is present at the input, which
guarantees that the power device is off in the event that the
input is left floating.
The SD input has a precision comparator with hysteresis and is
therefore suitable for slow changing signals (such as a scaled-
down output voltage); see the Shutdown (SD) Function section
for more information about this comparator.
LOW-SIDE DRIVERS (OUTA, OUTB)
The ADP3629/ADP3630/ADP3631 family of dual drivers is
designed to drive ground referenced N-channel MOSFETs. The
bias is internally connected to the V
DD
supply and to PGND.
When the ADP3629/ADP3630/ADP3631 are disabled, both
low-side gates are held low. An internal impedance is present
between the OUTA/OUTB pins and GND, even when V
DD
is
not present; this feature ensures that the power MOSFET is
normally off when bias voltage is not present.
When interfacing the ADP3629/ADP3630/ADP3631 to exter-
nal MOSFETs, the designer should consider ways to create a
robust design that minimizes stresses on both the driver and
the MOSFETs. These stresses include exceeding the short time
duration voltage ratings on the OUTA and OUTB pins, as well
as on the external MOSFET.
Power MOSFETs are usually selected to have low on resistance to
minimize conduction losses, which usually implies a large input
gate capacitance and gate charge.
SHUTDOWN (SD) FUNCTION
The ADP3629/ADP3630/ADP3631 feature an advanced shut-
down function with accurate thresholds and hysteresis.
The SD signal is an active high signal. An internal pull-up is
present on this pin and, therefore, it is necessary to pull down
the pin externally for the drivers to operate normally.
In some power systems, it is sometimes necessary to provide an
additional overvoltage protection (OVP) or overcurrent protection
(OCP) shutdown signal to turn off the power devices (MOSFETs
or IGBTs) in case of failure of the main controller.
An accurate internal reference is used for the SD comparator so
that it can be used to detect OVP or OCP fault conditions.
AC
INPUT
DC
OUTPUT
+
–
OUTA PGND
V
EN
SD
ADP3629/ADP3630/ADP3631
8401-018
Figure 22. Shutdown Function Used for Redundant OVP
