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10
Short Circuit Protection
A lossless hiccup mode short circuit protection feature is
provided, requiring only the Soft−Start capacitor to
implement. If a short circuit condition occurs (V
FFB
< 1.0 V),
the V
FFB
low comparator sets the FAULT latch. This causes
the MOSFET to shut off, disconnecting the regulator from it’s
input voltage. The Soft−Start capacitor is then slowly
discharged by a 2.0 mA current source until it reaches it’s
lower 0.7 V threshold. The regulator will then attempt to
restart normally, operating in it’s extended off time mode with
a 50% duty cycle, while the Soft−Start capacitor is charged
with a 60 mA charge current.
If the short circuit condition persists, the regulator output
will not achieve the 1.0 V low V
FFB
comparator threshold
before the Soft−Start capacitor is charged to it’s upper 2.5 V
threshold. If this happens the cycle will repeat itself until the
short is removed. The Soft−Start charge/discharge current
ratio sets the duty cycle for the pulses (2.0 mA/60 mA = 3.3%),
while actual duty cycle is half that due to the extended off time
mode (1.65%).
This protection feature results in less stress to the
regulator components, input power supply, and PC board
traces than occurs with constant current limit protection (see
Figures 12 and 13).
If the short circuit condition is removed, output voltage
will rise above the 1.0 V level, preventing the FAULT latch
from being set, allowing normal operation to resume.
Figure 12. CS5157H Demonstration Board Hiccup
Mode Short Circuit Protection. Gate Pulses are
Delivered While the Soft−Start Capacitor Charges, an
d
Cease During Discharge
M 25.0 ms
Trace 3− Soft−Start Timing Capacitor (1.0 V/div.)
Trace 4− 5.0 V Supply Voltage (2.0 V/div.)
Trace 2− Inductor Switching Node (2.0 V/div.)
Figure 13. Startup with Regulator Output Shorted
M 50.0 ms
Trace 4− 5.0 V from PC Power Supply (2.0 V/div.)
Trace 2− Inductor Switching Node (2.0 V/div.)
Overvoltage Protection
Overvoltage protection (OVP) is provided as result of the
normal operation of the V
2
control topology and requires no
additional external components. The control loop responds
to an overvoltage condition within 100 ns, causing the top
MOSFET to shut off, disconnecting the regulator from it’s
input voltage. The bottom MOSFET is then activated,
resulting in a “crowbar” action to clamp the output voltage
and prevent damage to the load (see Figures 14 and 15 ). The
regulator will remain in this state until the overvoltage
condition ceases or the input voltage is pulled low. The
bottom FET and board trace must be properly designed to
implement the OVP function.
Figure 14. OVP Response to an Input−to−Output
Short Circuit by Immediately Providing 0% Duty
Cycle, Crow−Barring the Input Voltage to Ground
M 10.0 ms
Trace 1− Regulator Output Voltage (1.0 V/div.)
Trace 2− Inductor Switching Node (5.0 V/div.)
Trace 4− 5.0 V from PC Power Supply (5.0 V/div.)
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11
Figure 15. OVP Response to an Input−to−Output Shor
t
Circuit by Pulling the Input Voltage to Ground
M 5.00 ms
Trace 1− Regulator Output Voltage (1.0 V/div.)
Trace 4− 5.0 V from PC Power Supply (2.0 V/div.)
External Output Enable Circuit
On/off control of the regulator can be implemented
through the addition of two additional discrete components
(see Figure 16). This circuit operates by pulling the
Soft−Start pin high, and the V
FFB
pin low, emulating a short
circuit condition.
Figure 16. Implementing Shutdown with the CS5157H
Shutdown
Input
5.0 V
MMUN2111T1 (SOT−23)
5
8
V
FFB
SS
IN4148
CS5157H
External Power Good Circuit
An optional Power Good signal can be generated through
the use of four additional external components (see
Figure 17). The threshold voltage of the Power Good signal
can be adjusted per the following equation:
V
Power Good
+
(R1 ) R2) 0.65 V
R2
This circuit provides an open collector output that drives
the Power Good output to ground for regulator voltages less
than V
Power
Good
.
Figure 17. Implementing Power Good with the CS5157
H
5.0 V
Power Good
10 k
V
OUT
PN3904
6.2 k
R1
R2
PN3904
10 k
R3
CS5157H
Figure 18. CS5157H Demonstration Board During
Power Up. Power Good Signal is Activated when
Output Voltage Reaches 1.70 V.
M 2.50 ms
Trace 4− 5.0 V Input (2.0 V/div.)
Trace 3 − 12 V Input (V
CC1
) and (V
CC2
) (10 V/div.)
Trace 1− Regulator Output Voltage (1.0 V/div.)
Trace 2− Power Good Signal (2.0 V/div.)
Selecting External Components
The CS5157H can be used with a wide range of external
power components to optimize the cost and performance of
a particular design. The following information can be used
as general guidelines to assist in their selection.
NFET Power Transistors
Both logic level and standard MOSFETs can be used. The
reference designs derive gate drive from the 12 V supply
which is generally available in most computer systems and
utilize logic level MOSFETs. Multiple MOSFETs may be
paralleled to reduce losses and improve efficiency and
thermal management.
Voltage applied to the MOSFET gates depends on the
application circuit used. Both upper and lower gate driver
outputs are specified to drive to within 1.5 V of ground when
in the low state and to within 2.0 V of their respective bias
supplies when in the high state. In practice, the MOSFET
gates will be driven rail to rail due to overshoot caused by the
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12
capacitive load they present to the controller IC. For the
typical application where V
CC1
= V
CC2
= 12 V and 5.0 V is
used as the source for the regulator output current, the
following gate drive is provided;
V
GATE(H)
+ 12 V * 5.0 V + 7.0 V, V
GATE(L)
+ 12 V
(see Figure 19.)
Figure 19. CS5157H Gate Drive Waveforms Depicting
Rail to Rail Swing
M 1.00 ms
Math 1 = V
GATE(H)
− 5.0 V
IN
Trace 3 = V
GATE(H)
(10 V/div.)
Trace 4 = V
GATE(L)
(10 V/div.)
Trace 2− Inductor Switching Nodes (5.0 V/div.)
The most important aspect of MOSFET performance is
RDS
ON
, which effects regulator efficiency and MOSFET
thermal management requirements.
The power dissipated by the MOSFETs may be estimated
as follows;
Switching MOSFET:
Power + I
LOAD
2
RDS
ON
duty cycle
Synchronous MOSFET:
Power + I
LOAD
2
RDS
ON
(
1 * duty cycle
)
Duty Cycle =
V
OUT
) (I
LOAD
RDS
ON OF SYNCH FET
)
ƪ
V
IN
)(I
LOAD
RDS
ON OF SYNCH FET
)
* (I
LOAD
RDS
ON OF SWITCH FET
)
ƫ
Off Time Capacitor (C
OFF
)
The C
OFF
timing capacitor sets the regulator off time:
T
OFF
+ C
OFF
4848.5
When the V
FFB
pin is less than 1.0 V, the current charging
the C
OFF
capacitor is reduced. The extended off time can be
calculated as follows:
T
OFF
+ C
OFF
24, 242.5
Off time will be determined by either the T
OFF
time, or the
time out timer, whichever is longer.
The preceding equations for duty cycle can also be used
to calculate the regulator switching frequency and select the
C
OFF
timing capacitor:
C
OFF
+
Perioid
(
1 * duty cycle
)
4848.5
where:
Period +
1
switching frequency
Schottky Diode for Synchronous MOSFET
A Schottky diode may be placed in parallel with the
synchronous MOSFET to conduct the inductor current upon
turn off of the switching MOSFET to improve efficiency.
The CS5157H reference circuit does not use this device due
to it’s excellent design. Instead, the body diode of the
synchronous MOSFET is utilized to reduce cost and
conducts the inductor current. For a design operating at
200 kHz or so, the low non−overlap time combined with
Schottky forward recovery time may make the benefits of
this device not worth the additional expense (see Figure 8,
channel 2). The power dissipation in the synchronous
MOSFET due to body diode conduction can be estimated by
the following equation:
Power
+
V
BD
I
LOAD
conduction time
switching frequency
Where V
BD
= the forward drop of the MOSFET body
diode. For the CS5157H demonstration board as shown in
Figure 8;
Power + 1.6 V 13 A 100 ns 233 kHz + 0.48 W
This is only 1.3% of the 36.4 W being delivered to the
load.
Input and Output Capacitors
These components must be selected and placed carefully
to yield optimal results. Capacitors should be chosen to
provide acceptable ripple on the input supply lines and
regulator output voltage. Key specifications for input
capacitors are their ripple rating, while ESR is important for
output capacitors. For best transient response, a combination
of low value/high frequency and bulk capacitors placed
close to the load will be required.
Output Inductor
The inductor should be selected based on its inductance,
current capability, and DC resistance. Increasing the
inductor value will decrease output voltage ripple, but
degrade transient response.
THERMAL MANAGEMENT
Thermal Considerations for Power
MOSFETs and Diodes
In order to maintain good reliability, the junction
temperature of the semiconductor components should be
kept to a maximum of 150°C or lower. The thermal
impedance (junction to ambient) required to meet this
requirement can be calculated as follows:
Thermal Impedance +
T
JUNCTION(MAX)
* T
AMBIENT
Power

CS5157HGD16

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Switching Controllers 5-Bit Synchronous
Lifecycle:
New from this manufacturer.
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