CS5157H
http://onsemi.com
13
A heatsink may be added to TO−220 components to
reduce their thermal impedance. A number of PC board
layout techniques such as thermal vias and additional copper
foil area can be used to improve the power handling
capability of surface mount components.
EMI Management
As a consequence of large currents being turned on and off
at high frequency, switching regulators generate noise as a
consequence of their normal operation. When designing for
compliance with EMI/EMC regulations, additional
components may be added to reduce noise emissions. These
components are not required for regulator operation and
experimental results may allow them to be eliminated. The
input filter inductor may not be required because bulk filter and
bypass capacitors, as well as other loads located on the board
will tend to reduce regulator di/dt effects on the circuit board
and input power supply. Placement of the power component to
minimize routing distance will also help to reduce emissions.
Figure 20. Filter Components
1000 pF
33 W
2.0 mH
Figure 21. Input Filter
1200 pF × 3.0/16 V
2.0 mH
+
Layout Guidelines
1. Place 12 V filter capacitor next to the IC and connect
capacitor ground to pin 11 (PGND).
2. Connect pin 11 (PGND) with a separate trace to the
ground terminals of the 5.0 V input capacitors.
3. Place fast feedback filter capacitor next to pin 8 (V
FFB
)
and connect it’s ground terminal with a separate, wide
trace directly to pin 14 (LGND).
4. Connect the ground terminals of the Compensation
capacitor directly to the ground of the fast feedback
filter capacitor to prevent common mode noise from
effecting the PWM comparator.
5. Place the output filter capacitor(s) as close to the load
as possible and connect the ground terminal to pin 14
(LGND).
6. Connect the V
FB
pin directly to the load with a separate
trace (remote sense).
7. Place 5.0 V input capacitors close to the switching
MOSFET and synchronous MOSFET.
Route gate drive signals V
GATE(H)
(pin 10) and V
GATE(L)
(pin 12 when used) with traces that are a minimum of 0.025
inches wide.
Figure 22. Layout Guidelines
To the negative terminal of the output capacitors
V
CC
100 p
0.1 mF
Soft−Start
OFF TIME
COMP
of the input capacitors
15 11
5
8
V
FFB
1.0 mF
